M68EVB908GB60E Freescale Semiconductor, M68EVB908GB60E Datasheet - Page 151

• Manufacturer Part Number: M68EVB908GB60E
• Description: BOARD EVAL FOR MC9S08GB60
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of M68EVB908GB60E

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: MC9S08GB
• Data Bus Width: 8 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08GB
• Kit Contents: GB60 Evaluation Kit
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08GB60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 10 Timer/PWM (TPM) Module
10.1
The MC9S08GB/GT includes two independent timer/PWM (TPM) modules which support traditional
input capture, output compare, or buffered edge-aligned pulse-width modulation (PWM) on each channel.
A control bit in each TPM configures all channels in that timer to operate as center-aligned PWM
functions. In each of these two TPMs, timing functions are based on a separate 16-bit counter with
prescaler and modulo features to control frequency and range (period between overflows) of the time
reference. This timing system is ideally suited for a wide range of control applications, and the
center-aligned PWM capability on the 3-channel TPM extends the field of applications to motor control in
small appliances.
The use of the fixed system clock, XCLK, as the clock source for either of the TPM modules allows the
TPM prescaler to run using the oscillator rate divided by two (ICGERCLK/2). This clock source must be
selected only if the ICG is configured in either FBE or FEE mode. In FBE mode, this selection is redundant
because the BUSCLK frequency is the same as XCLK. In FEE mode, the proper conditions must be met
for XCLK to equal ICGERCLK/2 (see
clock source with the ICG in either FEI or SCM mode will result in the TPM being non-functional.
10.2
The timer system in the MC9S08GB60 includes a 3-channel TPM1 and a separate 5-channel TPM2; the
timer system in the MC9S08GB32 includes two 2-channel modules, TPM1 and TPM2. Timer system
features include:
Freescale Semiconductor
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A total of eight channels:
— Each channel may be input capture, output compare, or buffered edge-aligned PWM
— Rising-edge, falling-edge, or any-edge input capture trigger
— Set, clear, or toggle output compare action
— Selectable polarity on PWM outputs
Each TPM may be configured for buffered, center-aligned pulse-width modulation (CPWM) on all
channels
Clock source to prescaler for each TPM is independently selectable as bus clock, fixed system
clock, or an external pin
Prescale taps for divide by 1, 2, 4, 8, 16, 32, 64, or 128
16-bit free-running or up/down (CPWM) count operation
16-bit modulus register to control counter range
Timer system enable
One interrupt per channel plus terminal count interrupt
Introduction
Features
MC9S08GB/GT Data Sheet, Rev. 2.3
Section 7.3.9, “Fixed Frequency
Clock”). Selecting XCLK as the
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