ADZS-21262-1-EZEXT Analog Devices Inc, ADZS-21262-1-EZEXT Datasheet - Page 37

• Manufacturer Part Number: ADZS-21262-1-EZEXT
• Description: BOARD DAUGHTER FOR ADSP-21262
• Manufacturer: Analog Devices Inc

Specifications of ADZS-21262-1-EZEXT

• Accessory Type: DSP
• Silicon Manufacturer: Analog Devices
• Core Architecture: SHARC
• Features: Expansion Interface, High Speed Converter (HSC) Interface
• Kit Contents: Board Docs
• Silicon Family Name: SHARC
• Silicon Core Number: ADSP-21262
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADSP-21262
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Figure 30
is low for the left channel and high for the right channel. Data is
valid on the rising edge of serial clock. The MSB is left-justified
to the frame sync transition but with a delay.
Table 34. S/PDIF Transmitter I
Figure 31
for the left channel and low for the right channel. Data is valid
on the rising edge of serial clock. The MSB is left-justified to the
frame sync transition with no delay.
Table 35. S/PDIF Transmitter Left-Justified Mode
Parameter
Timing Requirement
t
Parameter
Timing Requirement
t
I2SD
LJD
shows the default I
shows the left-justified mode. The frame sync is high
DAI_P20–1
DAI_P20–1
DAI_P20–1
SDATA
SCLK
FS
FS to MSB Delay in I
FS to MSB Delay in Left-Justified Mode
ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366
DAI_P20–1
DAI_P20–1
DAI_P20–1
2
SDATA
S-justified mode. The frame sync
SCLK
FS
2
S Mode
t
I2SD
MSB
2
S Mode
MSB
t
LJD
MSB–1
Rev. G | Page 37 of 56 | March 2011
MSB–1
Figure 31. Left-Justified Mode
MSB–2
Figure 30. I
MSB–2
2
S-Justified Mode
LEFT/RIGHT CHANNEL
LEFT/RIGHT CHANNEL
LSB+2
LSB+2
LSB+1
LSB+1
LSB
LSB
Nominal
1
Nominal
0
Unit
SCLK
Unit
SCLK