ADZS-21262-1-EZEXT Analog Devices Inc, ADZS-21262-1-EZEXT Datasheet - Page 14

BOARD DAUGHTER FOR ADSP-21262

ADZS-21262-1-EZEXT

Manufacturer Part Number
ADZS-21262-1-EZEXT
Description
BOARD DAUGHTER FOR ADSP-21262
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADZS-21262-1-EZEXT

Accessory Type
DSP
Silicon Manufacturer
Analog Devices
Core Architecture
SHARC
Features
Expansion Interface, High Speed Converter (HSC) Interface
Kit Contents
Board Docs
Silicon Family Name
SHARC
Silicon Core Number
ADSP-21262
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
ADSP-21262
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366
SPECIFICATIONS
Specifications are subject to change without notice.
OPERATING CONDITIONS
1
2
3
4
ELECTRICAL CHARACTERISTICS
1
2
3
4
5
6
7
8
9
10
11
Applies to input and bidirectional pins: AD15–0, FLAG3–0, DAI_Px, SPICLK, MOSI, MISO, SPIDS, BOOT_CFGx, CLK_CFGx, RESET, TCK, TMS, TDI, and TRST.
Applies to input pin CLKIN.
See ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366 for information on thermal specifications.
See Estimating Power for the ADSP-21362 SHARC Processors (EE-277) for further information.
Applies to output and bidirectional pins: AD15–0, RD, WR, ALE, FLAG3–0, DAI_Px, SPICLK, MOSI, MISO, EMU, TDO, and XTAL.
See
Applies to input pins: SPIDS, BOOT_CFGx, CLK_CFGx, TCK, RESET, and CLKIN.
Applies to input pins with 22.5 kΩ internal pull-ups: TRST, TMS, TDI.
Applies to three-stateable pins: FLAG3–0.
Applies to three-stateable pins with 22.5 kΩ pull-ups: AD15–0, DAI_Px, SPICLK, EMU, MISO, and MOSI.
Typical internal current data reflects nominal operating conditions.
See Estimating Power for the ADSP-21362 SHARC Processors (EE-277) for further information.
Characterized, but not tested.
Applies to all signal pins.
Guaranteed, but not tested.
Parameter
V
A
V
V
V
V
V
T
T
Parameter
V
V
I
I
I
I
I
I
I
IA
C
IH
IL
ILPU
OZH
OZL
OZLPU
DD-INTYP
J
J
DDINT
DDEXT
IH
IL
IH_CLKIN
IL_CLKIN
OH
OL
IN
VDD
3, 4
3, 4
3
VDD
3, 4
Output Drive Currents on Page 44
1
1
10, 11
1
5
1
4
5, 6
9
6
7, 8
2
Description
Internal (Core) Supply Voltage
Analog (PLL) Supply Voltage
External (I/O) Supply Voltage
High Level Input Voltage @ V
Low Level Input Voltage @ V
High Level Input Voltage @ V
Low Level Input Voltage @ V
Junction Temperature 136-Ball CSP_BGA
Junction Temperature 144-Lead LQFP_EP
Description
High Level Output Voltage
Low Level Output Voltage
High Level Input Current
Low Level Input Current
Low Level Input Current Pull-Up
Three-State Leakage Current
Three-State Leakage Current
Three-State Leakage Current Pull-Up
Supply Current (Internal)
Supply Current (Analog)
Input Capacitance
for typical drive current capabilities.
DDEXT
DDEXT
DDEXT
DDEXT
= Min
= Min
= Max
= Max
Rev. G | Page 14 of 56 | March 2011
Min
1.14
1.14
3.13
2.0
–0.5
1.74
–0.5
0
0
Test Conditions
@ V
@ V
@ V
@ V
@ V
@ V
@ V
@ V
t
A
f
IN
CCLK
VDD
= 1 MHz, T
K Grade
DDEXT
DDEXT
DDEXT
DDEXT
DDEXT
DDEXT
DDEXT
DDEXT
Max
1.26
1.26
3.47
V
+0.8
V
+1.19
+110
+110
= Min, V
DDEXT
DDEXT
= Max
= Min, I
= Min, I
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
= Max, V
+ 0.5
+ 0.5
CASE
DDINT
OH
OL
= 25°C, V
IN
IN
IN
IN
IN
IN
= Nom
= 1.0 mA
= –1.0 mA
= V
= 0 V
= 0 V
= 0 V
= 0 V
= V
Min
1.14
1.14
3.13
2.0
–0.5
1.74
–0.5
–40
–40
DDEXT
DDEXT
IN
B Grade
+125
+125
Max
1.26
1.26
3.47
V
+0.8
V
+1.19
2
= 1.2 V
Max
Max
DDEXT
DDEXT
2
+ 0.5
+ 0.5
Min
0.95
0.95
3.13
2.0
–0.5
1.74
–0.5
–40
–40
Min
2.4
Y Grade
Max
1.05
1.05
3.47
V
+0.8
V
+1.19
+125
+125
DDEXT
DDEXT
Max
0.4
10
10
200
10
10
200
800
10
4.7
+ 0.5
+ 0.5
Unit
V
V
μA
μA
μA
μA
μA
μA
mA
mA
pF
Unit
V
V
V
V
V
V
V
°C
°C

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