PIC16F684-I/SLG Microchip, PIC16F684-I/SLG Datasheet - Page 90

• Manufacturer Part Number: PIC16F684-I/SLG
• Description: pic, flash, Microcontrollers, Microprocessors, Semiconductors and Actives, ic, mcu
• Manufacturer: Microchip

PIC16F684
11.3.9
In Sleep mode, all clock sources are disabled. Timer2
will not increment, and the state of the module will not
change. If the ECCP pin is driving a value, it will
continue to drive that value. When the device wakes
up, it will continue from this state.
11.3.9.1
If the Fail-Safe Clock Monitor is enabled, a clock failure
will force the ECCP to be clocked from the internal
oscillator clock source, which may have a different
clock frequency than the primary clock.
See Section 3.0 “Clock Sources” for additional
details.
11.3.10
Any Reset will force all ports to Input mode and the
ECCP registers to their Reset states.
This forces the Enhanced CCP module to reset to a
state compatible with the standard CCP module.
DS41202C-page 88
OPERATION IN SLEEP MODE
EFFECTS OF A RESET
OPERATION WITH FAIL-SAFE
CLOCK MONITOR
Preliminary
11.3.11
The following steps should be taken when configuring
the ECCP module for PWM operation:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Configure the PWM pins P1A and P1B (and
P1C and P1D, if used) as inputs by setting the
corresponding TRISC bits.
Set the PWM period by loading the PR2 register.
Configure the ECCP module for the desired
PWM mode and configuration by loading the
CCP1CON register with the appropriate values:
• Select one of the available output
• Select the polarities of the PWM output
Set the PWM duty cycle by loading the CCPR1L
register and CCP1CON<5:4> bits.
For Half-bridge Output mode, set the dead band
delay by loading PWM1CON<6:0> with the
appropriate value.
If auto-shutdown operation is required, load the
ECCPAS register:
• Select the auto-shutdown sources using the
• Select the shutdown states of the PWM
• Set the ECCPASE bit (ECCPAS<7>).
• Configure the comparators using the
• Configure the comparator inputs as analog
If auto-restart operation is required, set the
PRSEN bit (PWM1CON<7>).
Configure and start TMR2:
• Clear the TMR2 interrupt flag bit by clearing
• Set the TMR2 prescale value by loading the
• Enable Timer2 by setting the TMR2ON bit
Enable PWM outputs after a new PWM cycle
has started:
• Wait until TMR2 overflows (TMR2IF bit is set).
• Enable the CCP1/P1A, P1B, P1C and/or P1D
• Clear the ECCPASE bit (ECCPAS<7>).
configurations and direction with the
P1M<1:0> bits.
signals with the CCP1M<3:0> bits.
ECCPAS<2:0> bits.
output pins using PSSAC<1:0> and
PSSBD<1:0> bits.
CMCON0 register (Register 8-1).
inputs.
the TMR2IF bit (PIR1<1>).
T2CKPS bits (T2CON<1:0>).
(T2CON<2>).
pin outputs by clearing the respective TRISC
bits.
SETUP FOR PWM OPERATION
 2004 Microchip Technology Inc.