zl50415 Zarlink Semiconductor, zl50415 Datasheet - Page 91

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zl50415

Manufacturer Part Number
zl50415
Description
Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
14.9.21
I
Accessed by CPU, serial interface and I
Buffer reservation for class 5. Granularity 1. (Default 0)
14.9.22
I
Accessed by CPU, serial interface and I
Buffer reservation for class 6 (second highest priority). Granularity 1. (Default 0)
14.9.23
I
Accessed by CPU, serial interface and I
Buffer reservation for class 7 (highest priority). Granularity 1. (Default 0)
14.9.24
Accessed by CPU; serial interface and I
QOSC00 through QOSC02 represents one set of values A-C for a 10/100 port when using the Weighted Random
Early Drop (WRED) Scheme described in Chapter 7. There are four such sets of values A-C specified in Classes
Byte Limit Set 0, 1, 2, and 3. For CPU port A-C values are defined using register CPUQOSC1, 2 and 3.
Each 10/ 100 port can choose one of the four Byte Limit Sets as specified by the QoS Select field located in bits 5
to 4 of the ECR2n register. The values A-C are per-queue byte thresholds for random early drop. QOSC02
represents A, and QOSC00 represents C.
Granularity when Delay bound is used: QOSC02: 128 bytes, QOSC01: 256 bytes, QOSC00: 512 bytes. Granularity
when WFQ is used: QOSC02: 512 bytes, QOSC01: 512 bytes, QOSC00: 512 bytes.
2
2
2
C Address h0BE; CPU Address 514
C Address h0BF; CPU Address 515
C Address h0C0; CPU Address 516
C — QOSC00 – BYTE_C01 (I
B — QOSC01 – BYTE_C02 (I
A — QOSC02 – BYTE_C03 (I
C5RS – Class 5 Reserve Size
C6RS – Class 6 Reserve Size
C7RS – Class 7 Reserve Size
QOSCn - Classes Byte Limit Set 0
7
Class 5 FCB Reservation
7
Class 6 FCB Reservation
7
Class 7 FCB Reservation
2
2
2
C Address h0C1, CPU Address 517)
C Address h0C2, CPU Address 518)
C Address h0C3, CPU Address 519)
2
2
2
2
C (R/W)
C (R/W)
C (R/W)
C (R/W):
Zarlink Semiconductor Inc.
ZL50418
91
0
0
0
Data Sheet

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