zl50415 Zarlink Semiconductor, zl50415 Datasheet - Page 66

• Manufacturer Part Number: zl50415
• Description: Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
• Manufacturer: Zarlink Semiconductor

14.4.4
I
Accessed by CPU, serial interface and I
In Port based VLAN Mode
In Tag based VLAN Mode
14.4.5
I
Accessed by CPU, serial interface and I
In Port Based VLAN Mode
2
2
C Address h53, CPU Address:h103
C Address h89, CPU Address:h105)
PVMAP00_1 – Port 00 Configuration Register 1
PVMAP00_3 – Port 00 Configuration Register 3
Bit [7:0]:
Bit [3:0]:
Bit [4]:
Bit [7:5]:
Bit [2:0]:
Bit [5:3]:
7
Unitag Port Priority
7
FP en
VLAN Mask for ports 26 to 24 (Default 7). Port 24 is the CPU port
Default Transmit priority. Used when Bit[7]=1 (Default 0)
PVID [11:8] (Default is F)
•
•
6
Drop
- 000 Transmit Priority Level 0 (Lowest)
- 001 Transmit Priority Level 1
- 010 Transmit Priority Level 2
- 011 Transmit Priority Level 3
- 100 Transmit Priority Level 4
- 101 Transmit Priority Level 5
- 110 Transmit Priority Level 6
- 111 Transmit Priority Level 7 (Highest)
Untrusted Port. (Default is 1)
This register is used to change the VLAN priority field of a packet to a
predetermined priority.
Untag Port Priority (Default 7)
- 1 : VLAN priority field is changed to Bit[7:5] at ingress port
- 0 : Keep VLAN priority field
VLAN Mask for ports 15 to 8 (Default is FF)
5
2
2
5
Default tx priority
C (R/W)
C (R/W)
Zarlink Semiconductor Inc.
ZL50418
4
Ultrust
66
3
3
PVID
2
VLAN Mask
0
0
Data Sheet