zl50415 Zarlink Semiconductor, zl50415 Datasheet - Page 82

• Manufacturer Part Number: zl50415
• Description: Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
• Manufacturer: Zarlink Semiconductor

CPU receive queue status
TX_AGE – Tx Queue Aging timer
I
Accessed by CPU, serial interface (RW)
Disable transmission queue aging if value is zero. Aging timer for all ports and queues.
This register must be set to 0 for ‘No Packet Loss Flow Control Test’.
14.8
14.8.1
I
Accessed by CPU, serial interface and I
The ZL50418 removes the MAC address from the data base and sends a Delete MAC Address Control Command
to the CPU. MAC address aging is enable/disable by boot strap TSTOUT9.
Bit [7:0] Low byte of the MAC address aging timer.
14.8.2
I
Accessed by CPU, serial interface and I
Bit [7:0]: High byte of the MAC address aging timer.
The default setting provide 300 seconds aging time. Aging time is based on the following equation:
{AGETIME_TIME,AGETIME_LOW} X (# of MAC entries in the memory X100µsec). Number of MAC entries = 32 K
when 1 MB is used per Bank. Number of entries = 64 K when 2 MB is used per Bank.
2
2
2
C Address: h07;CPU Address:h324
C Address h0A8; CPU Address:h400
C Address h0A9; CPU Address h401
- Bit [3:0]: Queue 3 to 0 not empty
- Bit [4]: Head of line entry for Queue 0 is valid for too long. CPU Queue 0 has no WRED threshold.
- Bit [7:5]: Head of line entry for Queue 3 to 1 is valid for too long or Queue length is longer than WRED
- Bit [5:0]: Unit of 100ms (Default 8)
(Group 4 Address) Search Engine Group
threshold.
AGETIME_LOW – MAC address aging time Low
AGETIME_HIGH –MAC address aging time High
7
6
5
2
2
C (R/W)
C (R/W)
Tx Queue Agent
Zarlink Semiconductor Inc.
ZL50418
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Data Sheet