zl50415 Zarlink Semiconductor, zl50415 Datasheet - Page 89

• Manufacturer Part Number: zl50415
• Description: Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
• Manufacturer: Zarlink Semiconductor

14.9.15
I
Accessed by CPU, serial interface and I
14.9.16
I
Accessed by CPU, serial interface and I
2
2
C Address h0B8, CPU Address 50E
C Address h0B9, CPU Address 50F
Bit [4:0]:
Bit [7:5]:
Bit [3:0]:
Bits [7:4]:
Bit [3:0]:
Bits [7:4]:
PR100 – Port Reservation for 10/100 ports
PRG – Port Reservation for Giga ports
7
7
Buffer low threshold
Buffer low threshold
In multiples of two frames (granularity). Used for triggering MC flow control
when destination port’s multicast best effort queue reaches MCC
threshold.(Default 0x10)
Flow control reaction period (Default 2) Granularity 4 uSec.
Per source port buffer reservation.
Define the space in the FDB reserved for each 10/100 port and CPU.
Expressed in multiples of 4 packets. For each packet 1536 bytes are
reserved in the memory.
Expressed in multiples of 4 packets. Threshold for dropping all best effort
frames when destination port best efforts queues reaches UCC threshold,
shared pool is all used and source port reservation is at or below the
PR100[7:4] level. Also the threshold for initiating UC flow control.
•
Per source port buffer reservation.
Define the space in the FDB reserved for each Gigabit port. Expressed in
multiples of 16 packets. For each packet 1536 bytes are reserved in the
memory.
Expressed in multiples of 16 packets. Threshold for dropping all best effort
frames when destination port best effort queues reach UCC threshold,
shared pool is all used and source port reservation is at or below the
PRG[7:4] level. Also the threshold for initiating UC flow control.
•
Default:
Default:
- h36 for 16+2 configuration with memory 2 MB/bank;
- h24 for 16+2 configuration with 1 MB/bank;
- H58 for memory 2 MB/bank;
- H35 for 1 MB/bank;
2
2
4
4
C (R/W)
C (R/W)
Zarlink Semiconductor Inc.
3
3
SP buffer reservation
SP Buffer reservation
ZL50418
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Data Sheet