zl50415 Zarlink Semiconductor, zl50415 Datasheet - Page 64

• Manufacturer Part Number: zl50415
• Description: Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
• Manufacturer: Zarlink Semiconductor

14.3.3
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CPU Address:h036
Accessed by CPU and serial interface (R/W)
GGControl – Extra GIGA Port Control
7
DF
Bit [7:6]
Bit [0]:
Bit [1]:
Bit [2]:
Bit [3]:
Bit [4]:
6
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1. If the source MAC address of the incoming packet is in the MAC table and
2. If the port is set as learning disable and the source MAC address of the
3. If the port is configured to filter untagged frames and an untagged frame
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Reset GIGA port A
GIGA port A use MII interface (10/100 M)
Reserved - Must be zero
GIGA port A direct flow control (MAC to MAC connection). The ZL50418
supports direct flow control mechanism; the flow control frame is therefore
not sent through the Gigabit port data path.
Reset GIGA port B
- 0: Normal operation (default)
- 1: Reset Gigabit port A. Normally used when a new Phy is connected (Hot swap).
- 0: Gigabit port operations at 1000 mode (default)
- 1: Gigabit port operations at 10/100 mode
- 0: Direct flow control disabled (default)
- 1: Direct flow control enabled
- 0: Normal operation (default)
- 1: Reset Gigabit port B
Security Enable (Default 00). The ZL50418 checks the incoming data for
one of the following conditions:
CPU installed
00 – Disable port security
01 – Discard violating packets
10 – Send packet to CPU and destination port
11 – Send packet to CPU only
is defined as secure address but the ingress port is not the same as the
port associated with the MAC address in the MAC table.
A MAC address is defined as secure when its entry at MAC table has static
status and bit 0 is set to 1. MAC address bit 0 (the first bit transmitted) indi-
cates whether the address is unicast or multicast. As source addresses are
always unicast bit 0 is not used (always 0). ZL50418 uses this bit to define
secure MAC addresses.
incoming packet is not defined in the MAC address table.
arrives or if the port is configured to filter tagged frames and a tagged
frame arrives.
If one of these three conditions occurs, the packet will be handled accord-
ing to one of the following specified options:
5
MiiB
4
RstA
Zarlink Semiconductor Inc.
ZL50418
64
3
DF
2
1
MiiA
0
RstA
Data Sheet