zl50409 Zarlink Semiconductor, zl50409 Datasheet - Page 42

• Manufacturer Part Number: zl50409
• Description: Managed 9-port 10/100m Ethernet Switch
• Manufacturer: Zarlink Semiconductor

6.2.2
The Rx interface is mainly responsible for communicating with the RxMAC. It keeps track of the start and end of
frame and frame status (good or bad). Upon receiving an end of frame that is good, the Rx interface makes a switch
request.
6.2.3
The RxDMA arbitrates among switch requests from each Rx interface. It also buffers the first 64 bytes of each
frame for use by the search engine when the switch request has been made.
6.2.4
First, the TxQ manager checks the per-class queue status and global reserved resource situation, and using this
information, makes the frame dropping decision after receiving a switch response. The dropping decision includes
the head-of-link blocking avoidance if the source port is not flow control enabled. If the decision is not to drop, the
TxQ manager links the unicast frame’s FCB to the correct per-port-per-class TxQ and updates the FCB information.
If multicast, the TxQ manager writes to the multicast queue for that port and class and also update the FCB
information including the duplicate count for this multicast frame. The TxQ manager can also trigger source port
flow control for the incoming frame’s source if that port is flow control enabled. Second, the TxQ manager handles
transmission scheduling; it schedules transmission among the queues representing different classes for a port.
Once a frame has been scheduled, the TxQ manager reads the FCB information and writes to the correct port
control module. The detail of the QoS decision guideline is described in chapter 5.
6.2.5
The port control module calculates the SRAM read address for the frame currently being transmitted. It also writes
start of frame information and an end of frame flag to the MAC TxFIFO. When transmission is done, the port control
module requests that the buffer be released.
6.2.6
The TxDMA multiplexes data and address from port control, and arbitrates among buffer release requests from the
port control modules.
Rx Interface
RxDMA
TxQ Manager
Port Control
TxDMA
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ZL50409
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Data Sheet