zl50409 Zarlink Semiconductor, zl50409 Datasheet - Page 124

• Manufacturer Part Number: zl50409
• Description: Managed 9-port 10/100m Ethernet Switch
• Manufacturer: Zarlink Semiconductor

13.4.2
Write Set up Time
Write Active Time
Write Hold Time
Write Recovery time
Data Set Up time
Data Hold time
P_A[2:0]
P_C S#
P_W E#
P_D ATA
(to dev ice)
Write Cycle
Typical CPU Timing Diagram for a CPU Write Cycle
Description
Set up tim e
Figure 14 - Typical CPU Timing Diagram for a CPU Write Cycle
Symbol
T
T
T
T
T
T
T
T
W S
WS
WH
WR
DS
WA
DH
DS
AD D R 0
D ATA0
Activ e Tim e
(SCLK=100 Mhz)
Min.
T
10
20
30
10
Zarlink Semiconductor Inc.
W A
2
2
ZL50409
Max.
124
T
T
W H
DH
R ecov ery Tim e
H old tim e
(SCLK=50 Mhz)
T
Min.
W R
10
40
60
10
2
2
T
T
W S
DS
Max.
D ATA1
Activ e Tim e
AD D R 1
P_A and P_CS# to falling
edge of P_WE#
At least 2 SCLK cycles
P_A and P_CS# to rising
edge of P_WE#
At least 3 SCLK cycles
P_DATA to falling edge of
P_WE#
P_DATA to rising edge of
P_WE#
T
W A
Refer to Figure 14
T
T
DH
W H
Data Sheet