hsp50214a Intersil Corporation, hsp50214a Datasheet - Page 52

• Manufacturer Part Number: hsp50214a
• Description: Programmable Downconverter
• Manufacturer: Intersil Corporation

POSITION
POSITION
20-18
17-15
14-12
31-26
23-22
21-20
16-14
13-12
11-9
BIT
BIT
8-6
5-3
2-0
25
24
19
18
17
CONTROL WORD 20: BUFFER RAM, DIRECT PARALLEL, AND DIRECT SERIAL OUTPUT CONFIGURATION
Link Following I Data
Link Following Q
Data
Link Following
Magnitude Data
Link Following
Phase Data
Link Following
Frequency Data
Link Following AGC
Level Data
Link Following Timing
Error Data
Reserved
Data Source for
Least Significant
Bytes of AOUT and
BOUT
Buffered Output
Mode Interface
AOUT Direct Parallel
Output Mode Data
Source
BOUT Direct Parallel
Output Mode Data
Source
Serial Output Sync
Polarity
Serial Output Clock
Polarity
Serial Output Sync
Position
Serial Out Clock
Divider
I Data Serial Output
Tag Bit
CONTROL WORD 19: SERIAL OUTPUT ORDER (SYNCHRONIZED TO PROCCLK) (Continued)
FUNCTION
FUNCTION
The serial data word, or link, following the I data word is selected using Table 12
(see Output Section).
The serial data word, or link, following the Q data word is selected using Table 12
(see Output Section).
The serial data word, or link, following the MAG data word is selected using Table 12
(see Output Section).
The serial data word, or link, following the PHAS data word is selected using Table 12
(see Output Section).
The serial data word, or link, following the FREQ data word is selected using Table 12
(see Output Section).
The serial data word, or link, following the AGC data word is selected using Table 12
(see Output Section).
The serial data word, or link, following the TIMER data word is selected using Table 12
(see Output Section).
Reserved.
Output LSBytes, bits (7:0), of AOUT and BOUT can provide:
0- Buffer RAM Mode Output or,
1- Parallel Direct Mode Output.
Buffered Mode Output interfaces to either:
0- 8-bit P (address = P ASEL(5:#); CLK = P RAM read).
1- 16-bit P (address = SEL(2:0); CLK = OEBL).
The data word sent by the Direct Parallel Output Mode to AOUT is:
00- I Data.
01- Magnitude.
1X- Frequency.
The data word sent by the Direct Parallel Output Mode to BOUT is:
00- Q Data.
01- Phase.
1X- Magnitude.
0- Normal Sync Mode (active high).
1- Sync Inverted (active low).
0- Output Clock Inverted rising edge aligns with data transitions.
1- Output Clock Normal falling edge aligns with data transitions.
0- Sync is asserted one bit time after the last bit of the serial word (Late Mode).
1- Sync is asserted one bit time prior to the first bit of the serial word (Early Mode).
000- Serial Output at PROCCLK/16.
001- Serial Output at PROCCLK/8.
010- Serial Output at PROCCLK/4.
011- Serial Output at PROCCLK/2.
1XX- Serial Output at PROCCLK rate.
00- No Tag Bit. LSB of word is passed.
01- 0 Tag Bit. LSB of word is set to zero.
1X- 1 Tag Bit. LSB of word is set to one.
(SYNCHRONIZED WITH PROCCLK)
0
HSP50214A
52
1
DESCRIPTION
DESCRIPTION