hsp50214a Intersil Corporation, hsp50214a Datasheet - Page 27

• Manufacturer Part Number: hsp50214a
• Description: Programmable Downconverter
• Manufacturer: Intersil Corporation

FIGURE 24C. POLYPHASE RESAMPLER FILTER EXPANDED
TABLE 10. POLYPHASE AND INTERPOLATING HALFBAND
NOTE:
In burst systems (such as TDMA), time resolution is needed
for quickly identifying the optimum sample point. The timing
is adjusted by shifting the decimation in the DSP P to the
closest sample. Use of timing error in this way may yield a
faster acquisition than a phase-locked loop coherent bit syn-
chronization. Finding the optimum sample point minimizes
intersymbol interference.
Fine time resolution is needed in CDMA systems to resolve
different multipath rays. In CDMA systems, the demands on
the programmable FIR can only be relieved by the re-sam-
pler/interpolation halfband filters. Assume the chip rate for a
baseband CDMA system is 1.2288MHz and PROCCLK is lim-
ited to 55MHz. Using the symmetric filter pre-sum approach,
PROCCLK limits the programmable FIR to 110MIPS (millions
of instructions per second) effective due to symmetry. If the
CDMA filter (loaded into the programmable FIR Section)
Bypass
Polyphase Filter
Polyphase and
1 Halfband Filter
Polyphase and
2 Halfband Filters
1 Halfband Filter
2 Halfband Filters
3. This frequency is set by the Resampler NCO.
-10
-1
-2
-3
-4
-5
-6
-7
-8
-9
2
1
0
MODE
FILTER MAXIMUM CLOCKING RATES
RESOLUTION PASSBAND FREQUENCY
RESPONSE
CYCLES
CLOCK
FREQUENCY (RELATIVE TO f
13
23
17
0
6
7
RE-SAM-
INPUT
RATE
(MHz)
= 9.17
= 4.23
= 2.39
= 7.86
= 3.24
PLER
55.00
55/13
55/23
55/17
55/6
55/7
POLATION
INTER-
RATE
2
4
2
4
-
-
IN
)
OUTPUT
(Note 3)
(Note 3)
(Note 3)
RATE
(MHz)
15.71
12.94
55.0
9.17
8.46
9.56
HSP50214A
27
requires an impulse response with a span of 12 chips, the fil-
ter at 2x the chip-rate would need 24 taps. The 24 taps would
translate into 59MIPS = (1.2288MHz)(2)(24). To get the same
filtering at 8x the chip rate would require 944MIPS =
(1.2288MHz)(8)(96). Direct 8x filtering can not be accom-
plished with the programmable filter alone because 944MIPS
are much greater that the 60MIPs effective limit set by PROC-
CLK. It is necessary to decimate down to 2x the chip rate to
get a realistic number of filter taps. Both interpolation halfband
filters are then used to obtain the 8x CDMA output. 944 MIPS
is a lot of MIPS. The HSP50214A gets the equivalent process-
ing by decimating down and interpolating back up.
Timing NCO
The Timing NCO is very similar to the carrier NCO Phase
Accumulator Section. It provides the NCO driven sample
pulse and associated phase information to the resampling
filter process described in the Re-sampler Filter Section.
The Timing NCO does not include the SIN/COS Section
found in the Carrier NCO. The top level block diagram is
shown in Figure 26.
FIGURE 25. GENERATING DATA READY PULSES FOR OUTPUT
PROCCLK
NV = INVALID MODE
RESAMPLER
POLYPHASE
THIS BLOCK GENERATES EXTRA
DATA READY PULSES FOR THE
NEW OUTPUTS FROM THE
INTERPOLATION PROCESS.
RESAMPLER
FILTER
DATA
NCO
PROCCLK/N
HALFBAND
FILTER #1
PULSE DELAY
COUNTER
PULSE
DELAY
HALFBAND
FILTER #2
0
0
0
0
1
1
1
1
0 0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
# EXTRA
0 BYPASS
0
1
1
3 (NV)
3
3
PULSES