tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 98

• Manufacturer Part Number: tmp89fm42
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

7.3 Function
7. Voltage Detection Circuit
RA002
Figure 7-3 Changes in the Voltage Detection Flag and the Voltage Detection Status Flag
7.3.5 Selecting the STOP mode release signal
Detection voltage level
VDCR2<VDxEN>
VDCR1<VDxSF>
VDCR1<VDxF>
(VDxLVL), VDCR1<VDxSF> is set to "1". When the supply voltage (VDD) becomes equal to or higher than
the detection voltage (VDxLVL), VDCR1<VDxSF> is cleared to "0".
release signal, STOP mode can be released when the supply voltage (VDD) becomes equal to or higher than
the detection voltage (VDxLVL).
tion interrupt request signals. In addition, before the operation is switched to STOP mode, clear SYSCR1
<RELM> to "0" and select the edge release mode.
voltage (VDxLVL), STOP mode cannot be activated.
higher than the detection voltage (VDxLVL).
ply voltage (VDD) becomes equal to or higher than the detection voltage (VDxLVL).
If VDCR2<VDxEN> is set at "1", when the supply voltage (VDD) becomes lower than the detection voltage
Unlike VDCR1<VDxF>, VDCR1<VDxSF> does not hold the set state.
Note 1: When the supply voltage (VDD) becomes lower than the detection voltage (VDxLVL) in the STOP, IDLE0 or
Note 2: Depending on the voltage detection timing, the voltage detection status flag (VDxSF) may be changed ear-
By setting VDCR2<SRSS> to select the voltage detection STOP mode release signal as the STOP mode
To use this function, set VDCR2<VDxMOD> to "0" and set the operation mode to generate voltage detec-
If the level release mode is selected and the supply voltage (VDD) is equal to or higher than the detection
Setting VDCR2<SRSS> to "00" allows STOP mode to be released depending on the state of the
Setting it to "01" allows STOP mode to be released when the supply voltage (VDD) becomes equal to or
Setting it to "10" allows STOP mode to be released depending on the state of the
Refer to Section 2 "CPU" for settings to activate or release STOP mode.
Note 1: After STOP mode is released by a voltage detection STOP mode release signal, the interrupt latch
Note 2: If the supply voltage (VDD) becomes equal to or higher than the detection voltage (VDxLVL) within 1
Note 3: When the voltage detection interrupt request signal of the voltage detection circuit is used as the STOP
VDD level
SLEEP0 mode, the voltage detection flag and the voltage detection status flag are changed after the opera-
tion mode is returned to NORMAL or SLOW mode.
lier than the voltage detection flag (VDxF) by a maximum of 2/fcgck[s].
becomes "1". If it is undesirable to accept an interrupt after STOP mode is released, disable interrupts
before STOP mode is activated. In addition, clear the interrupt latch before enabling interrupts after STOP
mode is released.
machine cycle after SYSCR1<STOP> is set to "1" and STOP mode is activated, STOP mode is not
released.
mode release signal, take into account sudden fluctuations in the supply voltage (VDD) and changes near
the detection voltage (VDxLVL) in setting the detection voltage (VDxLVL) and the warm-up time.
The flag is not set because VDCR2<VDxEN> is 0 .
Write 0 to VDCR1<VDxF>
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STOP
pin or when the sup-
TMP89FM42
STOP
pin.