tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 291

• Manufacturer Part Number: tmp89fm42
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RA001
SCL (Bus)
SDA (Bus)
SDA0 #$
SBI0SR2<AD0>
INTSBI0 Interrupt request
18.4.13GENERAL CALL detection monitor
18.4.14Last received bit monitor
SBI0SR2<LRB>
18.4.15Slave address and address recognition mode specification
SDA
SCL
data is "0" immediately after a start condition) in a slave mode.
detections. SBI0SR2<AD0> remains at "0" even if a "GENERAL CALL" is received.
by reading the contents of SBI0SR2<LRB>.
I2C0AR<SA> to the slave address.
I2C0AR<ALS> to "1". With a free data format, the slave address and the direction bit are not recognized, and
they are processed as data from immediately after the start condition.
SBI0SR2<AD0> is set to "1" when SBI0CR1<NOACK> is "0" and GENERAL CALL (all 8-bit received
Setting SBI0CR1<NOACK> to "1" disables the subsequent slave address match and GENERAL CALL
SBI0SR2<AD0> is cleared to "0" when a start or stop condition is detected on a bus.
The SDA line value stored at the rising edge of the SCL line is set to SBI0SR2<LRB>.
In the acknowledge mode, immediately after an interrupt request is generated, an acknowledge signal is read
When the serial bus interface circuit is used in the I
When the serial bus interface circuit is used with a free data format not to recognize the slave address, set
Figure 18-15 Changes in the GENERAL CALL Detection Monitor
Start condition
Figure 18-16 Changes in the Last Received Bit Monitor
1
D7
2
1
D7
3
D6
2
D6
GENERAL CALL
4
D5
3
D5
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5
D4
4
D4
6
D3
5
2
D3
C bus mode, clear I2C0AR<ALS> to "0", and set
7
D2
6
Output of an acknowledge signal
D2
8
D1
7
D1
9
D0
8
D
Acknowledgment
Stop condition
9
Acknowledgment
TMP89FM42