tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 229

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tmp89fm42

Manufacturer Part Number
tmp89fm42
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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RA001
16.5 Activation of STOP, IDLE0 or SLEEP0 Mode
16.5.1 Transition of register status
16.5.2 Transition of TXD pin status
Table 16-4 Transition of Register Status
UART0CR1
UART0CR2
UART0SR
UART0DR
becomes the status as shown in Table 16-4. For the registers that do not hold their values, make settings again
as needed after the operation mode is recovered.
5, whether data is transmitted/received or the operation is stopped.
RD0BUF
TD0BUF
When the STOP, IDLE0 or SLEEP0 mode is activated, the UART stops automatically and each register
When the IDLE0, SLEEP0 or STOP mode is activated, the TXD pin reverts to the status shown in Table 16-
Table 16-5 TXD Pin Status When the STOP, IDLE0 or SLEEP0 Mode Is Activated
<IRDASEL>
UART0CR1
UART0DR7
Cleared to
Cleared to
Indetermi-
Indetermi-
RD0DR7
TD0DR7
Hold the
PERR
"0"
"1"
value
TXE
nate
nate
7
0
0
-
-
UART0DR6
Cleared to
Cleared to
Indetermi-
Indetermi-
RD0DR6
TD0DR6
IDLE0 or SLEEP0 mode
Hold the
FERR
value
RXE
nate
nate
6
0
0
-
-
H level
L level
UART0DR5
Cleared to
Indetermi-
Indetermi-
STOPBT
RD0DR5
TD0DR5
Hold the
Hold the
Hold the
OERR
value
value
value
nate
nate
5
0
Page 215
SYSCR1<OUTEN>="1"
UART0DR4
Indetermi-
Indetermi-
RD0DR4
TD0DR4
Hold the
Hold the
Hold the
RTSEL
EVEN
value
value
value
nate
nate
4
-
-
H level
L level
UART0DR3
Cleared to
Indetermi-
Indetermi-
RD0DR3
Hold the
Hold the
Hold the
TD0DR3
RBSY
value
value
value
STOP mode
nate
nate
PE
3
0
SYSCR1<OUTEN>="0"
UART0DR2
Cleared to
Indetermi-
Indetermi-
IRDASEL
RD0DR2
TD0DR2
Hold the
Hold the
Hold the
RBFL
value
value
value
nate
nate
2
0
Hi-Z
RXDNC
UART0DR1
Cleared to
Indetermi-
Indetermi-
RD0DR1
TD0DR1
Hold the
Hold the
Hold the
TBSY
value
value
value
BRG
nate
nate
1
0
UART0DR0
Cleared to
Indetermi-
Indetermi-
TMP89FM42
STOPBR
RD0DR0
TD0DR0
Hold the
Hold the
value
TBFL
value
nate
nate
0
0
-
-

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