tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 45

• Manufacturer Part Number: tmp89fm42
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RA001
2.3.6.2
Note: When the operation returns to the NORMAL2 mode, fc is input to the frequency division circuit of the warm-up counter.
Table 2-4 Oscillation Start Operation at Release of the STOP Mode
Operation mode before the STOP
Dual-clock mode
Single-clock
mode
maskable interrupts. The following states are maintained during these modes.
mode is started
IDLE1/2 and SLEEP1 modes
The IDLE1/2 and SLEEP1 modes are controlled by the system control register 2 (SYSCR2) and
1. The CPU and the watchdog timer stop their operations. The peripheral circuits continue to oper-
2. The data memory, the registers, the program status word and the port output latches are all held
3. The program counter holds the address of the instruction 2 ahead of the instruction which starts
ate.
in the status in effect before IDLE1/2 or SLEEP1 mode was started.
the IDLE1/2 or SLEEP1 mode.
NORMAL1
NORMAL2
SLOW1
clock oscillation
clock oscillation
High-frequency
High-frequency
High-frequency
circuit
circuit
clock
-
clock oscillation cir-
clock oscillation cir-
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Low-frequency
Low-frequency
Low-frequency
clock
cuit
cuit
-
The high-frequency clock oscillation circuit starts
oscillation.
The low-frequency clock oscillation circuit stops
oscillation.
The high-frequency clock oscillation circuit starts
oscillation.
The low-frequency clock oscillation circuit starts
oscillation.
The high-frequency clock oscillation circuit stops
oscillation.
The low-frequency clock oscillation circuit starts
oscillation.
Oscillation start operation after release
TMP89FM42