tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 110

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tmp89fm42

Manufacturer Part Number
tmp89fm42
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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8.3 I/O Port Registers
8. I/O Ports
RA005
Port P0 output latch
Port P0 input/output control
Port P0 function control
Port P0 built-in pull-up resistor control
Port P0 input data
(0x0F1A)
(0x0F34)
(0x0F27)
(0x000D)
(0x0000)
P0PRD
P0DR
P0CR
P0FC
P0PU
Note: P0CR1 and P0CR0 must be clear to "0".
Note 1: When SYSCR2<XEN> is "1", setting P0FC0 to "0" generates a system clock (internal factor) reset. Normally, ports P00 or
Note 2: Symbol "I" means secondary function input
P01 are not used as ports, so P0FC0 must be set to "1".
Function
Function
Function
Function
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Bit Symbol
Bit Symbol
Bit Symbol
Bit Symbol
Bit Symbol
After reset
After reset
After reset
After reset
After reset
Function
0:
1:
0:
1:
0:
1:
0:
1:
R
R
R
R
R
7
0
7
0
7
0
7
0
7
0
-
-
-
-
-
R
R
R
R
R
6
0
6
0
6
0
6
0
6
0
-
-
-
-
-
R
R
R
R
R
5
0
5
0
5
0
5
0
5
0
-
-
-
-
-
Page 96
R
R
R
R
R
4
0
4
0
4
0
4
0
4
0
-
-
-
-
-
Outputs L level when the output mode is selected.
Outputs H level when the output mode is selected.
Input mode (port input)
Output mode (port output)
The built-in pull-up resistor is not connected.
The built-in pull-up resistor is connected. (The resistor is
connected in the input mode only. Under any other con-
ditions, setting to "1" does not make the resistor con-
nected.)
If the port is in the input mode, the contents of the port
are read. If not, "0" is read.
P0PRD3
P0CR3
P0PU2
R/W
R/W
R/W
P03
R
R
3
0
3
0
3
0
3
0
3
*
-
Port func-
tion
P0PRD2
XTIN (I)
P0CR2
P0PU2
P0FC2
R/W
R/W
R/W
R/W
P02
R
2
0
2
0
2
0
2
0
2
*
P0PRD1
P0CR1
P0PU1
R/W
R/W
R/W
P01
R
R
1
0
1
0
1
0
1
0
1
*
-
TMP89FM42
Port func-
tion
P0PRD0
P0CR0
P0FC0
P0PU0
XIN (I)
R/W
R/W
R/W
R/W
P00
R
0
0
0
0
0
1
0
0
0
*

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