mpc5632m Freescale Semiconductor, Inc, mpc5632m Datasheet - Page 95

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mpc5632m

Manufacturer Part Number
mpc5632m
Description
Mpc5634m Microcontroller Data Sheet
Manufacturer
Freescale Semiconductor, Inc
Datasheet
3.15.6
Freescale Semiconductor
1
2
3
External Device Data Sample at
Num
SS timing specified at F
with SRC = 0b00.
Maximum operating frequency is highly dependent on track delays, master pad delays, and slave pad delays.
FCK duty is not 50% when it is generated through the division of the system clock by an odd number.
1
1
2
3
4
5
6
7
8
eQADC Data Sample at
t
t
eQADC SSI Timing
t
t
t
t
SDO_LL
SDS_LL
EQ_HO
FCKHT
t
EQ
FCKLT
f
t
DVFE
FCK
FCK
Symbol
_
SU
FCK Falling Edge
FCK Rising Edge
Table 32. eQADC SSI Timing Characteristics (pads at 3.3 V or at 5.0 V)
CC
CC
CC
CC
CC
CC
CC
CC
CC
CLOAD = 25pF on all outputs. Pad drive strength set to maximum.
FCK Frequency
FCK Period (t
Clock (FCK) High Time
Clock (FCK) Low Time
SDS Lead/Lag Time
SDO Lead/Lag Time
Data Valid from FCK Falling Edge
(t
eQADC Data Setup Time (Inputs)
eQADC Data Hold Time (Inputs)
FCKLT+
SYS
SDO
SDS
FCK
SDI
= 80 MHz, V
t
SDO_LL
Preliminary—Subject to Change Without Notice
MPC5634M Microcontroller Data Sheet, Rev. 3
Rating
FCK
)
2, 3
Figure 29. eQADC SSI Timing
= 1/ f
DD
= 1.14 V to 1.32 V, V
FCK
4
5
)
2
2
1
1
1st (MSB)
3
3
6
t
t
SYS_CLK
SYS_CLK
7
1st (MSB)
1/17
DDEH
Min
-7.5
-7.5
22
2
1
1
8
− 6.5
− 6.5
= 4.5 V to 5.5 V, T
2nd
2nd
25th
Typ
25th
26th
A
9*
8*
= T
t
t
SYS_CLK
SYS_CLK
L
to T
Electrical Characteristics
Max
+7.5
+7.5
1/2
4
5
17
H
1
, and C
26th
+ 6.5
+ 6.5
L
f
t
= 50 pF
SYS_CLK
SYS_CLK
Unit
ns
ns
ns
ns
ns
ns
ns
95

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