mpc5632m Freescale Semiconductor, Inc, mpc5632m Datasheet - Page 30

• Manufacturer Part Number: mpc5632m
• Description: Mpc5634m Microcontroller Data Sheet
• Manufacturer: Freescale Semiconductor, Inc

Pinout and Signal Description
2
This section contains the pinouts for all production packages for the MPC5634M family of devices. Please note the following:
30
E200z3 core
Flash memory
RAM (random-access memory)
Calibration bus
DMA (direct memory access)
DSPI (deserial serial peripheral interface)
eMIOS (enhanced modular input-output system) Provides the functionality to generate or measure events
eQADC (enhanced queued analog-to-digital
converter)
eSCI (serial communication interface)
eTPU (enhanced time processor unit)
FlexCAN (controller area network)
FMPLL (frequency-modulated phase-locked
loop)
INTC (interrupt controller)
JTAG controller
NPC (Nexus Port Controller)
PIT (peripheral interrupt timer)
Temperature sensor
SWT (Software Watchdog Timer)
STM (System Timer Module)
•
•
Pins labeled “NC” are to be left unconnected. Any connection to an external circuit or voltage may cause unpredictable
device behavior or damage.
Pins labeled “NIC” have no internal connection.
Pinout and Signal Description
Block
Table 2. MPC5634M Series Block Summary
Preliminary—Subject to Change Without Notice
MPC5634M Microcontroller Data Sheet, Rev. 3
Executes programs and interrupt handlers.
Provides storage for program code, constants, and variables
Provides storage for program code, constants, and variables
Transfers data across the crossbar switch to/from peripherals attached to the
VertiCal connector
Performs complex data movements with minimal intervention from the core
Provides a synchronous serial interface for communication with external
devices
Provides accurate and fast conversions for a wide range of applications
Allows asynchronous serial communications with peripheral devices and
other microcontroller units
Processes real-time input events, performs output waveform generation, and
accesses shared data without host intervention
Supports the standard CAN communications protocol
Generates high-speed system clocks and supports the programmable
frequency modulation of these clocks
Provides priority-based preemptive scheduling of interrupt requests
Provides the means to test chip functionality and connectivity while remaining
transparent to system logic when not in test mode
Provides real-time development support capabilities in compliance with the
IEEE-ISTO 5001-2003 standard
Produces periodic interrupts and triggers
Provides the temperature of the device as an analog value
Provides protection from runaway code
Timer providing a set of output compare events to support AutoSAR and
operating system tasks
Function
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