IDT723642L15PF IDT, Integrated Device Technology Inc, IDT723642L15PF Datasheet - Page 7

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IDT723642L15PF

Manufacturer Part Number
IDT723642L15PF
Description
IC FIFO SYNC 2048X36 120QFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
7200r
Datasheet

Specifications of IDT723642L15PF

Function
Synchronous
Memory Size
72K (2K x 36)
Data Rate
67MHz
Access Time
15ns
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
120-TQFP, 120-VQFP
Configuration
Dual
Density
72Kb
Access Time (max)
10ns
Word Size
36b
Organization
1Kx36x2
Sync/async
Synchronous
Expandable
No
Bus Direction
Bi-Directional
Package Type
TQFP
Clock Freq (max)
66.7MHz
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Supply Current
400mA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
120
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
723642L15PF

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT723642L15PF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT723642L15PF8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
DETERMINING ACTIVE CURRENT CONSUMPTION AND POWER DISSIPATION
and CLKB set to f
disconnected to normalize the graph to a zero capacitance load. Once the capacitance load per data-output channel and the number of these device's
inputs driven by TTL HIGH levels are known, the power dissipation can be calculated with the equation below.
CALCULATING POWER DISSIPATION
IDT723622/723632/723642 CMOS SyncBiFIFO™
256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
The I
With I
250
100
150
200
300
50
0
CC(f)
CC(f)
P
where:
N
∆I
dc
C
fo
T
0
L
CC
current for the graph in Figure 1 was taken while simultaneously reading and writing a FIFO on the IDT723622/723632/723642 with CLKA
taken from Figure 1, the maximum power dissipation (P
= V
S
CC
. All data inputs and data outputs change state during each clock cycle to consume the highest supply current. Data outputs were
=
=
=
=
=
x [I
CC
10
(f) + (N x ∆I
f
T
C
data
A
L
number of outputs = 36
increase in power supply current for each input at a TTL HIGH level
duty cycle of inputs at a TTL HIGH level of 3.4 V
output capacitance load
switching frequency of an output
= 25°C
= 0pF
Figure 1. Typical Characteristics: Supply Current (I
= 1/2 f
S
CC
20
x dc)] + Σ(C
L
30
x V
V
CC
CC
= 5.0V
2
X fo)
f
T
S
) of these FIFOs may be calculated by:
⎯ Clock Frequency ⎯ MHz
40
7
50
CC
) vs Clock Frequency (f
V
V
CC
CC
= 5.5V
60
= 4.5V
COMMERCIAL TEMPERATURE RANGE
70
S
)
3022 drw 03a
80
90

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