IDT723642L15PF IDT, Integrated Device Technology Inc, IDT723642L15PF Datasheet - Page 19

• Manufacturer Part Number: IDT723642L15PF
• Description: IC FIFO SYNC 2048X36 120QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 7200r

Specifications of IDT723642L15PF

• Function: Synchronous
• Memory Size: 72K (2K x 36)
• Data Rate: 67MHz
• Access Time: 15ns
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 120-TQFP, 120-VQFP
• Configuration: Dual
• Density: 72Kb
• Access Time (max): 10ns
• Word Size: 36b
• Organization: 1Kx36x2
• Sync/async: Synchronous
• Expandable: No
• Bus Direction: Bi-Directional
• Package Type: TQFP
• Clock Freq (max): 66.7MHz
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Supply Current: 400mA
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 120
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 723642L15PF

NOTE:
1. t
B0 -B35
IDT723622/723632/723642 CMOS SyncBiFIFO™
256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
A0-A35
CLKA edge is less than t
CLKB
W/RB
CLKA
W/RA
SKEW1
MBB
ORB
MBA
ENA
ENB
CSB
CSA
IRA
is the minimum time between a rising CLKB edge and a rising CLKA edge for IRA to transition HIGH in the next CLKA cycle. If the time between the rising CLKB edge and rising
LOW
LOW
HIGH
LOW
HIGH
FIFO1 Full
HIGH
Previous Word in FIFO1 Output Register
t
CLKH
SKEW1
t
CLK
, then IRA may transition HIGH one CLKA cycle later than shown.
t
ENS2
t
CLKL
Figure 10. IRA Flag Timing and First Available Write when FIFO1 is Full
t
SKEW1
t
t
ENH
A
(1)
1
t
CLKH
t
CLK
19
t
CLKL
2
Next Word From FIFO1
t
PIR
t
t
ENS2
ENS2
t
DS
COMMERCIAL TEMPERATURE RANGE
To FIFO1
Write
t
PIR
t
t
t
ENH
DH
ENH
3022 drw 12