IDT723642L15PF IDT, Integrated Device Technology Inc, IDT723642L15PF Datasheet - Page 2

• Manufacturer Part Number: IDT723642L15PF
• Description: IC FIFO SYNC 2048X36 120QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 7200r

Specifications of IDT723642L15PF

• Function: Synchronous
• Memory Size: 72K (2K x 36)
• Data Rate: 67MHz
• Access Time: 15ns
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 120-TQFP, 120-VQFP
• Configuration: Dual
• Density: 72Kb
• Access Time (max): 10ns
• Word Size: 36b
• Organization: 1Kx36x2
• Sync/async: Synchronous
• Expandable: No
• Bus Direction: Bi-Directional
• Package Type: TQFP
• Clock Freq (max): 66.7MHz
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Supply Current: 400mA
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 120
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 723642L15PF

DESCRIPTION (CONTINUED)
each port are independent of one another and can be asynchronous or
coincident. The enables for each port are arranged to provide a simple
bidirectional interface between microprocessors and/or buses with synchro-
nous control.
progammable Almost-Full flag (AFA and AFB). AEA and AEB indicate when
a selected number of words remain in the FIFO memory. AFA and AFB indicate
when the FIFO contains more than a selected number of words.
are two-stage synchronized to the port clock that writes data into its array. The
Output Ready (ORA, ORB) and Almost-Empty (AEA, AEB) flags of a FIFO are
PIN CONFIGURATION
NOTES:
1. NC – no internal connection
2. Uses Yamaichi socket IC51-1324-828
IDT723622/723632/723642 CMOS SyncBiFIFO™
256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
Each FIFO has a programmable Almost-Empty flag (AEA and AEB) and a
The Input Ready (IRA, IRB) and Almost-Full (AFA, AFB) flags of a FIFO
GND
GND
GND
GND
V
V
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
NC
NC
NC
CC
CC
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
PQFP (PQ132-1, order code: PQF)
TOP VIEW
2
two-stage synchronized to the port clock that reads data from its array. Offset
values for the Almost-Full and Almost-Empty flags of both FIFOs can be
programmed from Port A.
If, at any time, the FIFO is not actively performing a function, the chip will
automatically power down. During the power down state, supply current
consumption (I
inputs will immediately take the device out of the power down state.
70°C. Industrial temperature range (-40°C to +85°C) is available by special
order. They are fabricated using IDT's high speed, submicron CMOS technology.
Two or more devices may be used in parallel to create wider data paths.
The 723622/723632/723642 are characterized for operation from 0°C to
CC
) is at a minimum. Initiating any operation (by activating control
COMMERCIAL TEMPERATURE RANGE
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
NC
NC
A
A
A
A
V
A
A
GND
A
A
A
A
A
A
A
GND
A
V
A
A
A
A
GND
A
A
A
A
A
V
A
NC
35
34
33
32
CC
31
30
29
28
27
26
25
24
23
22
CC
21
20
19
18
17
16
15
14
13
CC
12
3022 drw 02