RTL8181 ETC, RTL8181 Datasheet - Page 45

• Manufacturer Part Number: RTL8181
• Description: Wireless LAN Access Point/Gateway Controller
• Manufacturer: ETC

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Beacon Interval Register (WLAN_BCNITV)
ATIM Window Register (WLAN_ATIMWND)
Beacon Interrupt Interval Register (WLAN_BINTRITV)
Atim Interrupt Interval Register (WLAN_ATIMTRITV)
Phy Delay Register (WLAN_PHYDELAY)
Default Key 0 Register (WLAN_DK0)
Default Key 1 Register (WLAN_DK1)
Default Key 2 Register (WLAN_DK2)
CONFIDENTIAL
Bit
15-10
9-0
Bit
15-10
9-0
Bit
15-10
9-0
Bit
15-10
9-0
Bit
7-3
2-0
Bit
127-104 -
103-0
Bit
127-104
103-0
Bit
127:104
103:0
Bit Name
--
AtimWnd
Bit Name
-
BintrItv
Bit Name
-
AtimtrItv
Bit Name
-
PhyDelay
Bit Name
DK0
Bit Name
-
BcnItv
Bit Name Description
-
DK1
Bit Name Description
-
DK2
Description
Reserved
This r egister indicates the ATIM Window length in TU. It is written by the driver after the
NIC joins or creates an adhoc network.
Description
Reserved
This timer register will generate BcnInt (bit 13, ISR) at a setting time interval before TBTT to
prompt the host to prepare the beacon. The units of this register is microseconds. It is written
by the driver after the NIC joins a network or creates an adhoc network.
Description
Reserved
This timer register will generate ATIMInt (bit 12, ISR) at a setting time interval before the
end of the ATIM window in an adhoc network. The units of this register is microseconds. It is
written by the driver after the NIC joins a network or creates an adhoc network.
Description
Reserved
Physical Layer Delay Time: These three bits represent the delay time in µs between the MAC
and RF front end when Tx data.
Description
Reserved
Default Key 0: These 104 bits (bits 103:0) indicate the default 104-bit WEP key, which the
ID is 0 when KM (bits 5:4, SCR) is set to WEP104, the 24 most significant bits (bits
127:103) will be reserved. The 40 least significant bits (bits 39:0) indicate the default 40-bit
WEP key, which the ID is 0 when KM is set to WEP40, and the 64 most significant bits (bits
103:40) will be reserved.
This register is only permitted to read/write by 4-byte access.
Reserved
Default Key 1: These 104 bits (bits 103:0) indicate the default 104-bit WEP key, which the
ID is 1 when KM (bits 5:4, SCR) is set to WEP104, the 24 most significant bits (bits
127:103) will be reserved. The 40 least significant bits (bits 39:0) indicate the default 40-bit
WEP key, which the ID is 1 when KM is set to WEP40, and the 64 most significant bits (bits
103:40) will be reserved.
This register is only permitted to read/write by 4-byte access.
Reserved
Default Key 2: These 104 bits (bits 103:0) indicate the default 104-bit WEP key, which the
Description
Reserved
Beacon Interval: The Beacon Interval represents the number of time units (1 TU =
1024µs) between target beacon transmission times (TBTTs). This register is
written by the driver after starting a BSS/IBSS or joining IBSS network.
45
RTL8181
R/W
-
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
R/W
R/W
-
R/W
R/W
-
R/W
R/W
-
R/W
v1.0