RTL8181 ETC, RTL8181 Datasheet - Page 23

• Manufacturer Part Number: RTL8181
• Description: Wireless LAN Access Point/Gateway Controller
• Manufacturer: ETC

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12
11-10
9
8
7
6
5
4
3
2
1
Ethernet Control Register 2 (ETH0_CNR2, ETH1_CNR2)
Bit
16
15
14
13
12
11-8
6-4
CONFIDENTIAL
FSWInt
LBK[1:0]
NoCRC
AER
AB
AM
APM
AAP
ATM
AR
ALEN
Bit Name
UAEN
TXPON
TXPOFF
TXPF
RXPF
PTMASK[3:0]
IFG[2:0]
Forced software interrupt.
Writing 1 to this bit will trigger an interrupt, and
the SWIP bit will be set.
The NIC will clear this bit automatically after
SWIP bit is cleared.
Writing 0 to this bit has no effect.
Loopback test. Setting both bits will route all
transmit traffic from Tx FIFO to Rx FIFO
00: normal operation
01, 10: reserved
11: loopback mode
No CRC.
0: CRC appended
1: no CRC appended
Accept error packets
Accept Broadcast packets
Accept Multicast packets
Accept Physical address Matched packets
Accept All Physical packets
Accept Type match packets. This bit enables the
qualification of types of received packets.
Accept runt packets
Accept length specific packets. This bit is effective
when ATM bit is set.
0: filter length specific packets.
1: accept length specific packets.
Description
Unicast address filter enable (note).
0: disabled. 1: enabled.
Send Pause On packet. Write “1” to send Pause
On packet.
Send Pause Off packet. Write “1” to send Pause
Off packet.
Send Pause flag. Set, when NIC sends Pause-On
packet. Reset, when NIC sends Pause-Off packet.
Receive Pause Flag: Set, when NIC is in backoff
state because a pause packet received. Reset, when
pause state is clear.
Pause time mask. These bits mask the most
significant four bits of pause time 0xFFFF used
for a PAUSE packet. For example, if
PTMASK[3:0 ] is set to 0x01, a PAUSE packet
with pause time 0x1FFF will be sent when
descriptor unavailable condition occurs.
InterFrameGap Time: This field allows the user to
adjust the interframe gap time longer than the
standard: 9.6 us for 10Mbps, 960 ns for 100Mbps.
The time can be programmed from 9.6 us to 14.4
us (10Mbps) and 960ns to 1440ns (100Mbps).
The formula for the inter frame gap is
011: 9.6us/ 960ns
100: 9.6+4*0.1us/ 960+4*10ns
101: 9.6+8*0.1us/ 960+8*10ns
110: 9.6+12*0.1us/ 960+12*10ns
111: 9.6+16*0.1us/ 960+16*10ns
23
W
R/W 00
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
R/W InitVal
R/W 0
W
W
R
R
R/W 1111
R/W 011
0
0
0
0
RTL8181
v1.0