RTL8181 ETC, RTL8181 Datasheet - Page 16

• Manufacturer Part Number: RTL8181
• Description: Wireless LAN Access Point/Gateway Controller
• Manufacturer: ETC

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0xBD40_0100
0xBD40_0106
0xBD40_0116
5. System Configuration
GPIO pin for system configuration
GPIOB pin
9-6
11,10
13
15-14
1,0
System Control Register Set
Virtual address Size (byte) Name
0xBD01_0100
0xBD01_0104
0xBD01_0108
0xBD01_0109
Bridge Control Register (BRIDGE_REG)
Since the Lexra bus clock rate is fast than the network device, it needs a bus bridge between the CPU and device (i.e., Ethernet
and Wireless LAN controller). Also, this bridge is existed between CPU and PCI bridge.
Bit
2-0
3
6-4
7
10-8
11
14-12
15
18-16
19
20
21
22
CONFIDENTIAL
Bit Name
NIC0CKR
NIC0CKREN NIC0CKR write enable
-
DISNIC0B
NIC1CKR
NIC1CKREN NIC0CKR write enable
-
DISNIC1B
PCICLKR
PCICKREN
LXPCI
PCI2ENB
Reserved
4
4
1
1
Power on Latch Value
1111
other values are reserved
01
11
other values are reserved
1
0
Reserved
Reserved
WLAN_KMAR
WLAN_KMKEY
WLAN_KMC
Description
Bus clock to NIC0 clock ratio. 001= 1:2,
011=1:4,101=1:6,111=1:8 ,other value
reserved. The NIC0 and NIC1 maximum clock
is 50MHz.
Reserved
Disable NIC0,0 enable NIC0, 1 disable NIC0 R/W
Bus clock to NIC1 clock ratio. 001= 1:2,
011=1:4,101=1:6,111=1:8 ,other value
reserved
Reserved
Disable NIC1,0 enable NIC1, 1 disable NIC1 R/W
Bus clock to PCI clock ratio. 000=1:1,001=
1:2,010=1:3,011=1:4,100=1:5,101=1:6,110=1:
7,111=1:8. The PCI maximum clock is
50MHz.
PCICLKR write enable
The external Bus is PCI or Lexra(debug
mode).0 Lexra, 1 PCI.
The second PCI bus enable. 0 enable second
PCI device,1 disable second PCI device
BRIDGE_R
EG
PLLMN_R
EG
MEM_REG RTL8181 Memory clock rate
CPU_REG RTL8181 CPU clock rate
WLAN key map address register
WLAN key map key value
WLAN key map configuration
Description
WLAN, Eherernet0, Ethernet1 and PCI
bridge configuration register
RTL8181 DPLL parameter
Operating setting
CPU=200,MEM=100 if
Memory use asynchronous
mode
JTAG mode
Normal mode (wlan LED)
Memory clock use
asynchronous mode.
Synchronous mode,the MEM
clock same as CPU clock
Reserved
Reserved
16
R/W
R/W
R/W
-
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Power on default
1,1,1,1
1,1
1
1,1
InitVal
011
0
-
0
011
0
0
0
101
0
1
1
RTL8181
v1.0