AD7711A Analog Devices, AD7711A Datasheet - Page 9

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AD7711A

Manufacturer Part Number
AD7711A
Description
CMOS, 24-Bit Sigma-Delta, Signal Conditioning ADC with RTD Current Source
Manufacturer
Analog Devices
Datasheet

Specifications of AD7711A

Resolution (bits)
24bit
# Chan
2
Sample Rate
19.5kSPS
Interface
Ser
Analog Input Type
Diff-Bip,Diff-Uni
Ain Range
Bip (Vref)/(PGA Gain),Uni (Vref)/(PGA Gain)
Adc Architecture
Sigma-Delta
Pkg Type
DIP,SOIC

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Control Register (24 Bits)
A write to the device with the A0 input low writes data to the control register. A read to the device with the A0 input low accesses the
contents of the control register. The control register is 24 bits wide and when writing to the register 24 bits of data must be written;
otherwise the data will not be loaded to the control register. In other words, it is not possible to write just the first 12 bits of data into
the control register. If more than 24 clock pulses are provided before TFS returns high, then all clock pulses after the 24th clock
pulse are ignored. Similarly, a read operation from the control register should access 24 bits of data.
MD2
0
0
0
0
1
1
1
1
REV. D
Operating Mode
MD1
0
0
1
1
0
0
1
1
*Must always be 0 to ensure correct operation of the device.
MD0
0
1
0
1
0
1
0
1
MSB
FS11* FS10
MD2
Operating Mode
Normal Mode. This is the normal mode of operation of the device whereby a read to the device with A0
high accesses data from the data register. This is the default condition of these bits after the internal
power-on reset.
Activate Self-Calibration. This activates self-calibration on the channel selected by CH. This is a one-step
calibration sequence, and when complete, the part returns to normal mode (with MD2, MD1, MD0 of
the control register returning to 0, 0, 0). The DRDY output indicates when this self-calibration is complete
and valid data is available in the output register. For this calibration type, the zero-scale calibration is done
internally on shorted (zeroed) inputs, and the full-scale calibration is done internally on V
Activate System Calibration. This activates system calibration on the channel selected by CH. This is a
two-step calibration sequence, with the zero-scale calibration done first on the selected input channel and
DRDY indicating when this zero-scale calibration is complete. The part returns to normal mode at the
end of this first step in the two-step sequence.
Activate System Calibration. This is the second step of the system calibration sequence with full-scale
calibration being performed on the selected input channel. Once again, DRDY indicates when the full-
scale calibration is complete. When this calibration is complete, the part returns to normal mode.
Activate System Offset Calibration. This activates system offset calibration on the channel selected by
CH. This is a one-step calibration sequence and, when complete, the part returns to normal mode with
DRDY indicating when this system offset calibration is complete. For this calibration type, the zero-scale
calibration is done on the selected input channel, and the full-scale calibration is done internally on V
Activate Background Calibration. This activates background calibration on the channel selected by CH. If
the background calibration mode is on, then the AD7711A provides continuous self-calibration of the
reference and shorted (zeroed) inputs. This calibration takes place as part of the conversion sequence,
extending the conversion time and reducing the word rate by a factor of 6. Its major advantage is that
the user does not have to worry about recalibrating the device when there is a change in the ambient
temperature. In this mode, the shorted (zeroed) inputs and V
continuously monitored, and the calibration registers of the device are automatically updated.
Read/Write Zero-Scale Calibration Coefficients. A read to the device with A0 high accesses the contents
of the zero-scale calibration coefficients of the channel selected by CH. A write to the device with A0 high
writes data to the zero-scale calibration coefficients of the channel selected by CH. The word length for
reading and writing these coefficients is 24 bits, regardless of the status of the WL bit of the control
register. Therefore, when writing to the calibration register 24 bits of data must be written; otherwise the
new data will not be transferred to the calibration register.
Read/Write Full-Scale Calibration Coefficients. A read to the device with A0 high accesses the contents of
the full-scale calibration coefficients of the channel selected by CH. A write to the device with A0 high
writes data to the full-scale calibration coefficients of the channel selected by CH. The word length for
reading and writing these coefficients is 24 bits, regardless of the status of the WL bit of the control
register. Therefore, when writing to the calibration register, 24 bits of data must be written; otherwise the
new data will not be transferred to the calibration register.
MD1
MD0
FS9
FS8
G2
FS7
G1
FS6
G0
–9–
CH
FS5
FS4
PD
WL
FS3
REF
, as well as the analog input voltage, are
FS2
IO
BO
FS1
FS0
B/U
FS0
AD7711A
REF
.
REF
.
2

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