AD7711A Analog Devices, AD7711A Datasheet - Page 24

• Manufacturer Part Number: AD7711A
• Description: CMOS, 24-Bit Sigma-Delta, Signal Conditioning ADC with RTD Current Source
• Manufacturer: Analog Devices

Specifications of AD7711A

• Resolution (bits): 24bit
• # Chan: 2
• Sample Rate: 19.5kSPS
• Interface: Ser
• Analog Input Type: Diff-Bip,Diff-Uni
• Ain Range: Bip (Vref)/(PGA Gain),Uni (Vref)/(PGA Gain)
• Adc Architecture: Sigma-Delta
• Pkg Type: DIP,SOIC

AD7711A
SIMPLIFYING THE EXTERNAL CLOCKING MODE
INTERFACE
In many applications, the user may not require the facility of
writing to the on-chip calibration registers. In this case, the
serial interface to the AD7711A in external clocking mode can
be simplified by connecting the TFS line to the A0 input of the
AD7711A (see Figure 14). This means that any write to the
device will load data to the control register (since A0 is low
while TFS is low), and any read to the device will access data
from the output data register or from the calibration registers
(since A0 is high while RFS is low). It should be noted that in
this arrangement, the user does not have the capability of read-
ing from the control register.
Another method of simplifying the interface is to generate the
TFS signal from an inverted RFS signal. However, generating
the signals the opposite way around (RFS from an inverted
TFS) will cause writing errors.
MICROCOMPUTER/MICROPROCESSOR INTERFACING
The AD7711A’s flexible serial interface allows easy interface to
most microcomputers and microprocessors. Figure 15 shows a
flowchart diagram for a typical programming sequence for read-
ing data from the AD7711A to a microcomputer while Figure 16
shows a flowchart diagram for writing data to the AD7711A.
Figures 17, 18, and 19 show some typical interface circuits.
The flowchart of Figure 15 is for continuous read operations
from the AD7711A output register. In the example shown, the
DRDY line is continuously polled. Depending on the micropro-
cessor configuration, the DRDY line may come to an interrupt
input, in which case the DRDY will automatically generate an
interrupt without being polled. Reading the serial buffer could
be anything from one read operation up to three read operations
(where 24 bits of data are read into an 8-bit serial register). A
read operation to the control/calibration registers is similar, but,
in this case, the status of DRDY can be ignored. The A0 line is
brought low when the RFS line is brought low when reading
from the control register.
The flowchart also shows the bits being reversed after they have
been read in from the serial port. This depends on whether the
microprocessor expects the MSB of the word first or the LSB of
the word first. The AD7711A outputs the MSB first.
Figure 14. Simplified Interface with TFS Connected to A0
INTERFACE
LINES
FOUR
RFS
SDATA
SCLK
TFS
A0
AD7711A
–24–
The flowchart in Figure 16 is for a single 24-bit write operation
to the AD7711A control or calibration registers. This shows
data being transferred from data memory to the accumulator
before being written to the serial buffer. Some microprocessor
systems will allow data to be written directly to the serial buffer
from data memory. Writing data to the serial buffer from the
accumulator will generally consist of either two or three write
operations, depending on the size of the serial buffer.
The flowchart also shows the option of the bits being reversed
before being written to the serial buffer. This depends on
whether the first bit transmitted by the microprocessor is the
MSB or the LSB. The AD7711A expects the MSB as the first
bit in the data stream. In cases where the data is being read or
being written in bytes and the data has to be reversed, the bits
will have to be reversed for every byte.
Figure 15. Flowchart for Continuous Read
Operations to the AD7711A
CONFIGURE AND
INITIALIZE C/ P
SERIAL BUFFER
ORDER OF BITS
RFS, TFS HIGH
SERIAL PORT
POLL DRDY
RFS HIGH
REVERSE
RFS LOW
START
BRING
LOW?
BRING
BRING
DRDY
READ
YES
NO
3
REV. D