SC16C852SVIET,115 NXP Semiconductors, SC16C852SVIET,115 Datasheet - Page 4

• Manufacturer Part Number: SC16C852SVIET,115
• Description: IC UART DL 1.8V W/FIFO 36-TFBGA
• Manufacturer: NXP Semiconductors

Specifications of SC16C852SVIET,115

• Features: Programmable
• Number Of Channels: 2, DUART
• Fifo's: 128 Byte
• Protocol: RS485
• Voltage - Supply: 1.8V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 36-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935286451115; SC16C852SVIET-G; SC16C852SVIET-G

NXP Semiconductors
5. Pinning information
SC16C852SV_1
Product data sheet
5.1 Pinning
5.2 Pin description
Table 2.
Symbol
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
CDA
CDB
Fig 2.
Fig 3.
Pin configuration for TFBGA36
TFBGA36 ball mapping (transparent top view)
Pin description
Pin
A3
B3
A2
B2
A1
B1
C3
C1
B4
F3
C
D
Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
A
B
E
F
Type
I/O
I
LOWPWR
Rev. 01 — 23 September 2008
RXA
AD4
AD5
AD7
TXB
1
Description
Address and Data bus (bidirectional). These pins are the 8-bit
multiplexed data bus and address bus for transferring information to
or from the controlling CPU. AD0 is the least significant bit and is
address A0 during the address cycle, and AD7 is the most significant
bit and is address A7 during the address cycle.
Carrier Detect (active LOW). These inputs are associated with
individual UART channels A through B. A logic 0 on this pin indicates
that a carrier has been detected by the modem for that channel.
XTAL2
ball A1
index area
RXB
AD2
AD3
TXA
CS
2
A
B
C
D
E
F
XTAL1
IOW
CDB
AD0
AD1
AD6
1
Transparent top view
3
SC16C852SVIET
2
3
DSRB
CDA
V
V
IOR
RIA
4
4
DD
SS
002aad603
5
6
RESET
DSRA
DTRA
RTSB
INTA
RIB
5
SC16C852SV
CTSA
DTRB
RTSA
CTSB
002aac352
INTB
LLA
6
© NXP B.V. 2008. All rights reserved.
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