H5TQ2G63BFR-H9C HYNIX SEMICONDUCTOR, H5TQ2G63BFR-H9C Datasheet - Page 75

• Manufacturer Part Number: H5TQ2G63BFR-H9C
• Description: 58T1898
• Manufacturer: HYNIX SEMICONDUCTOR

Specifications of H5TQ2G63BFR-H9C

• Memory Type: SDRAM
• Memory Configuration: 128M X 16
• Access Time: 13.5ns
• Interface Type: CMOS
• Memory Case Style: FBGA
• No. Of Pins: 96
• Operating Temperature Range: 0°C To +85°C
• Memory Size: 2 Gbit
• Rohs Compliant: Yes

Rev. 0.5 / Aug. 2010
Timing Parameters by Speed Bin (Continued)
Note: The following general notes from page 61 apply to Table : a
Valid Clock
Requirement after
Self Refresh Entry
(SRE) or Power-
Down Entry (PDE)
Valid Clock
Requirement before
Self Refresh Exit
(SRX) or Power-
Down Exit (PDX) or
Reset Exit
Power Down
Timings
Exit Power Down
with DLL on to any
valid command; Exit
Precharge Power
Down with DLL
frozen to commands
not requiring a locked
DLL
Exit Precharge
Power Down with
DLL frozen to
commands requiring
a locked DLL
CKE minimum pulse
width
Command pass
disable delay
Power Down Entry to
Exit Timing
Timing of ACT
command to Power
Down entry
Timing of PRE or
PREA command to
Power Down entry
Timing of RD/RDA
command to Power
Down entry
Timing of WR
command to Power
Down entry
(BL8OTF, BL8MRS,
BC4OTF)
Parameter
tACTPDEN
tWRPDEN
tRDPDEN
tPRPDEN
tCPDED
tCKSRE
tCKSRX
Symbol
tXPDLL
tCKE
tPD
tXP
MAX(10nC
WL+4+(tW
tCKE(min) 9*tREFI tCKE(min) 9*tREFI tCKE(min) 9*tREFI
max(5nsC
max(5nsC
tCK(avg))
K, 10ns)
K, 10ns)
RL+4+1
K,24ns)
Min
R/
7
4
1
1
1
800MHz
Max
-
-
-
-
-
-
-
-
-
-
MAX(10nC
WL+4+(tW
max(5nsC
max(5nsC
tCK(avg))
K, 10ns)
K, 10ns)
RL+4+1
K,24ns)
Min
R/
7
5
1
1
1
900MHz
Max
-
-
-
-
-
-
-
-
-
-
MAX(10nC
WL+4+(tW
max(5nsC
max(5nsC
tCK(avg))
K, 10ns)
K, 10ns)
RL+4+1
K,24ns)
Min
R/
7
5
1
1
1
1.0GHz
Max
-
-
-
-
-
-
-
-
-
-
H5TQ2G63BFR
Units Notes
nCK
nCK
nCK
nCK
nCK
15
2
9
75