H5TQ2G63BFR-H9C HYNIX SEMICONDUCTOR, H5TQ2G63BFR-H9C Datasheet - Page 50

• Manufacturer Part Number: H5TQ2G63BFR-H9C
• Description: 58T1898
• Manufacturer: HYNIX SEMICONDUCTOR

Specifications of H5TQ2G63BFR-H9C

• Memory Type: SDRAM
• Memory Configuration: 128M X 16
• Access Time: 13.5ns
• Interface Type: CMOS
• Memory Case Style: FBGA
• No. Of Pins: 96
• Operating Temperature Range: 0°C To +85°C
• Memory Size: 2 Gbit
• Rohs Compliant: Yes

Rev. 0.5 / Aug. 2010
7.6 ODT Timing Definitions
7.6.1 Test Load for ODT Timings
Different than for timing measurements, the reference load for ODT timings is defined in Figure .
7.6.2 ODT Timing Reference Load
ODT Timing Definitions
Definitions for tAON, tAONPD, tAOF, tAOFPD and tADC are provided in the table and subsequent figures. Measurement
reference settings are provided in the table.
ODT Timing Definitions
Reference Settings for ODT Timing Measurements
Measured Parameter
Symbol
t
t
AONPD
AOFPD
t
t
t
AON
AOF
ADC
CK,
t
t
AONPD
AOFPD
CK
t
t
t
AON
ADC
AOF
Rising edge of CK - CK defined by the end point of
Timing Reference Points
ODTLcnw, ODTLcwn4 or ODTLcwn8
DUT
Rising edge of CK - CK defined by
Rising edge of CK - CK defined by
ODT being first registered high
ODT being first registered low
Rising edge of CK - CK with
Rising edge of CK - CK with
RTT_Nom Setting
the end point of ODTLon
the end point of ODTLoff
Begin Point Definition
VDDQ
VSSQ
DQ, DM
DQS,
TDQS,
R
R
R
R
R
R
R
R
R
ZQ
ZQ
ZQ
ZQ
ZQ
ZQ
ZQ
ZQ
ZQ
DQS
/12
/12
/12
/12
/12
TDQS
/4
/4
/4
/4
RTT_Wr Setting
= 25 Ω
RTT
R
BD_REFLOAD_ODT
NA
NA
NA
NA
NA
NA
NA
NA
ZQ
/2
VTT =
VSSQ
End point: Extrapolated point at VRTT_Wr and
End point: Extrapolated point at VRTT_Nom
End point: Extrapolated point at VRTT_Nom
V
SW1
Extrapolated point at VSSQ
Extrapolated point at VSSQ
0.05
0.10
0.05
0.10
0.05
0.10
0.05
0.10
0.20
VRTT_Nom respectively
End Point Definition
[V]
V
SW2
0.10
0.20
0.10
0.20
0.10
0.20
0.10
0.20
0.30
[V]
H5TQ2G63BFR
Note
Figure
Figure
Figure
Figure
Figure
Figure
50