PDI1394L40BE,551 NXP Semiconductors, PDI1394L40BE,551 Datasheet - Page 63

• Manufacturer Part Number: PDI1394L40BE,551
• Manufacturer: NXP Semiconductors

Specifications of PDI1394L40BE,551

• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
13.3 Asynchronous Control and Status Interface
13.3.1 Asynchronous RX/TX Control (ASYCTL) – Base Address: 0x080
Reset Value 0x00300320
Bit 23:
Bit 22:
Bit 21:
Bit 20:
Bit 19..16:
Bit 15..13:
Bit 12..0:
13.3.2 Asynchronous RX/TX Memory Status (ASYMEM) – Base Address: 0x084
Reset Value 0x00033333
Bit 17:
Bit 16:
Bit 15:
Bit 14:
Bit 13:
Bit 12:
Bit 11:
Bit 10:
Bit 9:
Bit 8:
Bit 7:
Bit 6:
Bit 5:
Bit 4:
Bit 3:
Bit 2:
Bit 1:
Bit 0:
2000 Dec 15
1394 enhanced AV link layer controller
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
DIS_BCAST: Disable the reception of broadcast packets (async packets address to 0x3F).
ARXRST: Asynchronous receiver reset. This bit will auto clear when the link layer state machine is idle.
ATXRST: Asynchronous transmitter reset. the power-up reset value of this bit is “0”, however, after every bus reset
this bit is set (1). this effectively disables the asynchronous transmitter; re-enable the async transmitter by clearing
this bit after each bus reset, especially if asynchronous transmission is to be used.
ARXALL: Receive and filter only RESPONSE packets. When set (1), all responses are stored. When clear (0), only
solicited responses are stored.
MAXRC: Maximum number of asynchronous transmitter single phase retries
TOS: Time out seconds, integer of 1 second
TOF: Time out fractions, integer of 1/8000 second. Resets to 0320h, which is 100 milliseconds.
Unused bits read ‘0’. The information in this register is primarily used for diagnostics.
TRSPQIDLE: Transmitter response queue is idle. Indicates that the transfer register for this queue is empty.
TREQQIDLE: Transmitter request queue is idle. Indicates that the transfer register for this queue is empty.
RRSPQF: Receiver response queue full.
RRSPQAF: Receiver response queue almost full (precisely 1 more quadlet available).
RRSPQ5AV: Receiver response queue at least 5 quadlets available.
RRSPQE: Receiver response queue empty.
RREQQF: Receiver request queue full.
RREQQAF: Receiver request queue almost full (precisely 1 more quadlet available).
RREQQ5AV: Receiver request queue at least 5 quadlets available.
RREQQE: Receiver request queue empty.
TRSPQF: Transmitter response queue full.
TRSPQAF: Transmitter response queue almost full (precisely 1 more quadlet available).
TRSPQ5AV: Transmitter response queue at least 5 quadlets available.
TRSPQE: Transmitter response queue empty.
TREQQF: Transmitter request queue full.
TREQQAF: Transmitter request queue almost full (precisely 1 more quadlet available).
TREQQ5AV: Transmitter request queue at least 5 quadlets available.
TREQQE: Transmitter request queue empty.
31 30
31 30
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
MAXRC
59
TOS
TOF
SV00889
SV00918
PDI1394L40
Preliminary specification