PDI1394L40BE,551 NXP Semiconductors, PDI1394L40BE,551 Datasheet - Page 44

• Manufacturer Part Number: PDI1394L40BE,551
• Manufacturer: NXP Semiconductors

Specifications of PDI1394L40BE,551

• Lead Free Status / Rohs Status: Compliant

1. A read of the RDI register (0xB0) should be done before looking for an interrupt in the GLOBCSR register.
lower 8 bits, and leave the other bits unaffected (see Section 12.5.2 for more information). The values written to undefined fields/bits are ignored
Philips Semiconductors
12.7.1.1 Interrupt Hierarchy
NOTE:
13.0 REGISTER MAP
Registers are 32 bits (quadlet) wide and all accesses are always done on a quadlet basis. This means that it is not possible to write just the
and thus DON’T CARE.
A full bitmap of all registers is listed in Table 6. The meaning of shading and bit cell values is as follows:
Table 6. Full Bitmap of all Registers (consists of four tables shown on the following pages)
2000 Dec 15
1394 enhanced AV link layer controller
A bit/field with no name written in it and dark shading is reserved and not used.
A bit/field with a name in it and light shading is a READ ONLY (status) bit/field.
A one bit value (0 or 1) written at the bottom of a writable (control) bit is the default value after power-on-reset.
3 2 1 0
HIF INT_N
GLOBCSR (0x018)
Figure 33. Interrupt Hierarchy
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
14
20
10
18 17 16 15 14 13
9
9
8
8
7 6 5 4 3 2 1 0
7
40
6 5 4 3 2 1 0
10
9 8 7 6 5 4 3 2 1 0
IRXINTACK (0x04C)
ITXINTACK (0x02C)
ASYINTACK (0x0A0)
LNKPHYINTACK (0x008)
SV01837
PDI1394L40
Preliminary specification