EP1S20F780I6N Altera, EP1S20F780I6N Datasheet - Page 454

• Manufacturer Part Number: EP1S20F780I6N
• Description: IC STRATIX FPGA 20K LE 780-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S20F780I6N

• Number Of Logic Elements/cells: 18460
• Number Of Labs/clbs: 1846
• Total Ram Bits: 1669248
• Number Of I /o: 586
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 18460
• # I/os (max): 586
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 18460
• Ram Bits: 1669248
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Drive Strength
Drive Strength
4–26
Stratix Device Handbook, Volume 2
Each I/O standard supported by Stratix and Stratix GX devices drives out
a minimum drive strength. When an I/O is configured as LVTTL or
LVCMOS I/O standards, you can specify the current drive strength, as
summarized in
Standard Current Drive Strength
Each I/O standard supported by Stratix and Stratix GX devices drives out
a minimum drive strength.
strength of each I/O standard.
When the SSTL-2 Class I and II I/O standards are implemented on top or
bottom I/O pins, the drive strength is designed to be higher than the
drive strength of the buffer when implemented on side I/O pins. This
allows the top or bottom I/O pins to support 200-MHz operation with the
standard 35-pF load. At the same time, the current consumption when
using top or bottom I/O pins is higher than the side I/O pins. The high
current strength may not be necessary for certain applications where the
value of the load is less than the standard test load (e.g., DDR interface).
The Quartus II software allows you to reduce the drive strength when the
I/O pins are used for the SSTL-2 Class I or Class II I/O standard and
being implemented on the top or bottom I/O through the Current
Strength setting. Select the minimum strength for lower drive strength.
Note to
(1)
GTL
GTL+
SSTL-3 Class I
SSTL-3 Class II
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
1.5-V HSTL Class I
1.5-V HSTL Class II
CTT
AGP 1
Table 4–6. Minimum Current Drive Strength of Each I/O Standard
Because this I/O standard uses an open drain buffer, this value refers to I
×
Table
I/O Standard
4–6:
Table
4–7.
Table 4–6
summarizes the minimum drive
Current Strength, I
I
OL
= 1.5, I
40
34
16.4
13.4
8.1
6.7
16
16
8
8
8
(1)
(1)
OH
Altera Corporation
= –0.5
OL
/I
OH
(mA)
June 2006
OL
.