ANXS1750FXC3M AMD (ADVANCED MICRO DEVICES), ANXS1750FXC3M Datasheet - Page 70

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ANXS1750FXC3M

Manufacturer Part Number
ANXS1750FXC3M
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ANXS1750FXC3M

Lead Free Status / RoHS Status
Compliant
Table A-4 contains the definitions of acronyms that may
have been used in this document.
70
Acronyms
ACPI
AGP
APCI
API
APIC
BIOS
BIST
BIU
CPGA
DDR
DIMM
DMA
DRAM
EIDE
EISA
EPROM
FIFO
FSB
GART
HSTL
IDE
ISA
JEDEC
JTAG
LAN
LRU
LVTTL
MSB
MUX
NMI
OD
OPGA
Meaning
Advanced Configuration and Power Interface
Accelerated Graphics Port
AGP Peripheral Component Interconnect
Application Programming Interface
Advanced Programmable Interrupt Controller
Basic Input/Output System
Built-In Self-Test
Bus Interface Unit
Ceramic Pin Grid Array
Double-Data Rate
Dual Inline Memory Module
Direct Memory Access
Direct Random Access Memory
Enhanced Integrated Device Electronics
Extended Industry Standard Architecture
Enhanced Programmable Read Only Memory
First In, First Out
Front Side Bus
Graphics Address Remapping Table
High-Speed Transistor Logic
Integrated Device Electronics
Industry Standard Architecture
Joint Electron Device Engineering Council
Joint Test Action Group
Large Area Network
Least-Recently Used
Low Voltage Transistor to Transistor Logic
Most Significant Bit
Multiplexer
Non-Maskable Interrupt
Open-drain
Organic Pin Grid Array
31177H
Table A-4. Definitions of Acronyms
A.2.4
• www.amd.com
Other web sites of interest include the following:
• JEDEC home page—www.jedec.org
• IEEE home page—www.computer.org
• AGP Forum—www.agpforum.org
Acronyms
PGA
PA
PCI
PDE
PDT
PLL
PMSM
POS
POST
RAM
ROM
RXA
SDI
SDRAM
SIP
SMbus
SPD
SRAM
SROM
TLB
TOM
TTL
VAS
VPA
VGA
USB
ZDB
Appendix A: Conventions, Abbreviations, and References
Web Sites and Support
Meaning
Pin Grid Array
Physical Address
Peripheral Component Interconnect
Page Directory Entry
Page Directory Table
Phase Locked Loop
Power Management State Machine
Power-On Suspend
Power-On Self-Test
Random Access Memory
Read Only Memory
Read Acknowledge Queue
System DRAM Interface
Synchronous Direct Random Access Memory
Serial Initialization Packet
System Management Bus
Serial Presence Detect
Synchronous Random Access Memory
Serial Read Only Memory
Translation Lookaside Buffer
Top of Memory
Transistor to Transistor Logic
Virtual Address Space
Virtual Page Address
Video Graphics Adapter
Universal Serial Bus
Zero Delay Buffer
AMD Geode™ NX Processors Data Book

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