ANXS1750FXC3M AMD (ADVANCED MICRO DEVICES), ANXS1750FXC3M Datasheet - Page 43

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ANXS1750FXC3M

Manufacturer Part Number
ANXS1750FXC3M
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ANXS1750FXC3M

Lead Free Status / RoHS Status
Compliant
Power Management
Note 1. On power up, the FID[3:0] pins are set to a clock multiplier value of 6x for the NX 1750@14W and NX 1500@6W
Note 2. Value programmed into the FidVidCtl MSR (MSR C001_0041h).
Note 3. The maximum FID that may be selected by software is reported in the FidVidStatus MSR (MSR C001_0042h).
Note 4. BIOS initializes the CLK_Ctl MSR (MSR C001_001Bh) during the POST routine to the desired value. The CPU ID
Note 5. Value driven on SDATA[36:32]# pins during the FID_Change special bus cycle. The SDATA bus is active Low, so
*The AMD Geode NX 1750@14W processor operates at 1.4 GHz, the NX 1500@6W processor operates at 1.0 GHz, and the NX 1250@6W processor operates at
667 MHz. Model numbers reflect performance as described here: http://www.amd.com/connectivitysolutions/geodenxbenchmark.
AMD Geode™ NX Processors Data Book
(Note 2, Note 3,
FID[4:0]
Note 4)
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
processors* and 5x for the NX 1250@6W processor*. After reset, software is responsible for transitioning the pro-
cessor to the desired frequency.
and implemented features such as PowerNow! and S2K Bus Disconnect have implications to the appropriate value
for this register. Refer to the AMD Geode™ NX Processors BIOS Considerations Application Note (publication ID
32483) and the BIOS Requirements for BIOS Requirements for AMD PowerNow™ Technology Application Note
(publication ID 25264) for more details on the CLK_Ctl register.
the SDATA[36:32]# values listed are what would be observed on the circuit board with a digital storage scope.
Table 3-1. FID[4:0] SYSCLK Multiplier Combinations (Note 1)
Clock
Mode
11.5x
12.5x
10.5x
5.5x
6.5x
7.5x
8.5x
9.5x
11x
12x
10x
5x
6x
7x
8x
9x
SDATA[36:32]#
(Note 5)
11111
11110
11101
11100
11011
11010
11001
11000
10111
10110
10101
10100
10011
10010
10001
10000
(Note 2, Note 3,
FID[4:0]
Note 4)
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Clock
Mode
13.5x
16.5x
13x
14x
15x
16x
17x
18x
3x
4x
31177H
SDATA[36:32]#
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
(Note 5)
01111
01101
11100
11100
11100
11100
11100
11100
11100
11100
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