MT49H32M9FM-33 IT Micron Technology Inc, MT49H32M9FM-33 IT Datasheet - Page 23

• Manufacturer Part Number: MT49H32M9FM-33 IT
• Manufacturer: Micron Technology Inc
• Type: RLDRAMr

Specifications of MT49H32M9FM-33 IT

• Organization: 32Mx9
• Density: 288Mb
• Address Bus: 22b
• Maximum Clock Rate: 300MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: uBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 609mA
• Pin Count: 144
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Not Compliant

Input Slew Rate Derating
PDF: 09005aef80a41b46/Source: 09005aef809f284b
288Mb_RLDRAM_II_CIO_D2.fm - Rev. M 12/10 EN
Note:
Table 11 on page 24 and Table 12 on page 25 define the address, command, and data
setup and hold derating values. These values are added to the default
t
the 2 V/ns the nominal setup and hold specifications are based upon.
To determine the setup and hold time needed for a given slew rate, add the
default specification to the “
specification to the “
derated data setup and hold values can be determined in a like manner using the “
V
The derating values on Table 11 and Table 12 apply to all speed grades.
The setup times on Table 11 and Table 12 represent a rising signal. In this case, the time
from which the rising signal crosses V
must be maintained across all slew rates. The derated setup timing represents the point
at which the rising signal crosses V
is calculated by determining the time needed to maintain the given slew rate and the
delta between V
Table 12 are also valid for falling signals (with respect to V
cross point).
The hold times in Table 11 and Table 12 represent falling signals. In this case, the time
from the CK/CK# cross point to when the signal crosses V
be maintained across all slew rates. The derated hold timing represents the delta
between the CK/CK# cross point to when the falling signal crosses V
value is calculated by determining the time needed to maintain the given slew rate and
the delta between the CK/CK# cross point and V
Table 12 are also valid for rising signals (with respect to V
CK# cross point).
AH/
REF
The above descriptions also pertain to data setup and hold derating when CK/CK# are
replaced with DK/DK#.
t
to CK/CK# Crossing” and “
CH/
288Mb: x9, x18, x36 2.5V V
t
DH specifications when the slew rate of any of these input signals is less than
IH
(AC)
t
AH/
MIN and the CK/CK# cross point. The setup values in Table 11 and
t
CH CK/CK# Crossing to V
t
AS/
23
t
t
DH to CK/CK# Crossing to V
CS V
REF(DC)
REF
IH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
(AC)
Electrical Specifications – AC and DC
to CK/CK# Crossing” and the
to the CK/CK# cross point. This derated value
EXT
MIN to the CK/CK# cross point is static and
, 1.8V V
IH(DC)
REF
. The hold values in Table 11 and
” derated values on Table 11. The
DD
IL
IL[AC]
IH(DC)
[DC] MAX and the CK and
, HSTL, CIO, RLDRAM II
REF
©2003 Micron Technology, Inc. All rights reserved.
MAX and the CK/CK#
MIN is static and must
” values on Table 12.
REF(DC)
t
AS/
t
AH/
t
. This derated
CS/
t
AS/
t
CH default
t
DS and
t
CS
t
DS