ADV7196AKSZ Analog Devices Inc, ADV7196AKSZ Datasheet - Page 25

ADV7196AKSZ

Manufacturer Part Number
ADV7196AKSZ
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV7196AKSZ

Adc/dac Resolution
11b
Screening Level
Commercial
Package Type
MQFP
Pin Count
52
Lead Free Status / RoHS Status
Compliant
In toggling MR17 (Sharpness Filter Enable/Disable) and setting
the Filter Gain register value to 99hex it can be seen that the line
contours of the cross hatch pattern change their sharpness
Adaptive Filter Control Application
The figure below shows a typical signal to be processed by the
Adaptive Filter Control block.
The following register settings where used to obtain the
results shown in the figure below, i.e., to remove the ringing
on the Y signal:
Input data was generated by an external signal source.
Address
00hex
01hex
02hex
03hex
04hex
05hex
09hex
10hex
22hex
23hex
24hex
25hex
26hex
27hex
Mode Register 0
Mode Register 1
Mode Register 2
Mode Register 3
Mode Register 4
Mode Register 5
Mode Register 6
Filter Gain
Adaptive Filter Gain 1
Adaptive Filter Gain 2
Adaptive Filter Gain 3
Adaptive Filter Threshold A
Adaptive Filter Threshold B
Adaptive Filter Threshold C
TEK RUN
4
T
T
CH4
Table VII.
100mV
M 100ns
T
12.8222ms
ALL FIELDS
Register Setting
40hex
81hex
00hex
78hex
00hex
80hex
3Ehex
00hex
AChex
9Ahex
88hex
28hex
3Fhex
64hex
TRIG’D
CH4
TEK RUN
4
T
T
.
CH4
100mV
M 100ns
T
The figure below shows the output signal when changing the Adap-
tive Filter mode to Mode B (MR56 = “1”).
The Adaptive Filter control can also be demonstrated using the
internally generated crosshatch test pattern and toggling the Adap-
tive Filter Control bit (MR57) using the following register settings:
Address
00hex
01hex
02hex
03hex
04hex
05hex
06hex
07hex
08hex
09hex
10hex
22hex
23hex
24hex
25hex
26hex
27hex
12.8222ms
ALL FIELDS
TRIG’D
Mode Register 0
Mode Register 1
Mode Register 2
Mode Register 3
Mode Register 4
Mode Register 5
Color Y
Color Cr
Color Cb
Mode Register 6
Filter Gain
Adaptive Filter Gain 1
Adaptive Filter Gain 2
Adaptive Filter Gain 3
Adaptive Filter Threshold A
Adaptive Filter Threshold B
Adaptive Filter Threshold C
CH4
TEK RUN
4
T
T
CH4
Table VIII.
100mV
M 100ns
T
12.8222ms
ALL FIELDS
ADV7196A
Register Setting
40hex
85hex
00hex
78hex
00hex
80hex
6Chex
52hex
52hex
3Ehex
00hex
AChex
9Ahex
88hex
28hex
3Fhex
64hex
TRIG’D
CH4

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