MCF5280CVM66 Freescale Semiconductor, MCF5280CVM66 Datasheet - Page 707

• Manufacturer Part Number: MCF5280CVM66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5280CVM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Controller Family/series: ColdFire
• No. Of I/o's: 150
• Program Memory Size: 2KB
• Ram Memory Size: 64KB
• Cpu Speed: 66.67MHz
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of Pwm Channels: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

33.13.3 MII Async Inputs Signal Timing (ECRS and ECOL)
Table 33-23
Figure 33-13
33.13.4 MII Serial Management Channel Timing (EMDIO and EMDC)
The FEC functions correctly with a maximum MDC frequency of 2.5 MHz.
management channel timings.
Figure 33-14
Freescale Semiconductor
1
ECOL has the same timing in 10 Mbit 7-wire interface mode.
Num
M9
1
M10
M11
M12
M13
M14
M15
Num
ETXD[3:0] (outputs)
lists MII asynchronous inputs signal timing.
ECRS, ECOL minimum pulse width
ETXCLK (input)
shows MII asynchronous input timings listed in
shows MII serial management channel timings listed in
EMDC falling edge to EMDIO output invalid (minimum propagation
delay)
EMDC falling edge to EMDIO output valid (max prop delay)
EMDIO (input) to EMDC rising edge setup
EMDIO (input) to EMDC rising edge hold
EMDC pulse width high
EMDC pulse width low
ETXEN
ETXER
ECRS, ECOL
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Table 33-24. MII Serial Management Channel Timing
Figure 33-12. MII Transmit Signal Timing Diagram
Figure 33-13. MII Async Inputs Timing Diagram
Table 33-23. MII Async Inputs Signal Timing
Characteristic
Characteristic
M5
M6
M7
M9
Table
M8
Min
1.5
33-23.
Table
40% 60% MDC period
40% 60% MDC period
Min
10
—
33-24.
0
0
Max
—
Table 33-24
Max
25
—
—
—
Electrical Characteristics
ETXCLK period
Unit
ns
ns
ns
ns
lists MII serial
Unit
33-23