MCF5280CVM66 Freescale Semiconductor, MCF5280CVM66 Datasheet - Page 437

• Manufacturer Part Number: MCF5280CVM66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5280CVM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Controller Family/series: ColdFire
• No. Of I/o's: 150
• Program Memory Size: 2KB
• Ram Memory Size: 64KB
• Cpu Speed: 66.67MHz
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of Pwm Channels: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

23.4.1.1
As
The choice of DTIN or internal bus clock is programmed in the UCSR.
23.4.1.2
The following sections describe how to calculate baud rates.
23.4.1.2.1
When the internal bus clock is the UART clocking source, it goes through a divide-by-32 prescaler and
then passes through the 16-bit divider of the concatenated UBG1n and UBG2n registers. The baud-rate
calculation is:
Freescale Semiconductor
Figure 23-17
•
•
An external clock signal on the DTINn pin.
clock; when divided by 16, it is asynchronous.
The internal bus clock supplies an asynchronous clock source divided by 32 and then divided by
the 16-bit value programmed in UBG1n and UBG2n. See
Generator Registers
Programmable Divider
Calculating Baud Rates
DTOUTn
If DTINn is a clocking source for the timer or UART, that timer module
cannot use DTINn for timer input capture.
Internal Bus Clock Baud Rates
DTINn
UTXDn
URXDn
shows, the UARTn transmitter and receiver can use the following clock sources:
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
(UBG1n/UBG2n).”
UART
Rx Buffer
Tx Buffer
Figure 23-17. Clocking Source Diagram
Rx
Tx
Baudrate
Timer Module
On-Chip
Clocking sources programmed in UCSR
=
----------------------------------- -
[
32 x Divider
NOTE
When not divided,
f
sys
Divider
16-bit
÷ 16
÷ 1
]
Section 23.3.11, “UART Baud Rate
÷ 32
DTINn
TIN
TIN
provides a synchronous
Internal
Bus Clock
f
sys
UART Modules
Eqn. 23-1
23-17