TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 94

• Manufacturer Part Number: TMPM362F10FG
• Description: 32BIT MICROCONTROLLER
• Manufacturer: Toshiba
• Series: TX03r

Specifications of TMPM362F10FG

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, Microwire, SIO, SPI, SSP, UART/USART
• Peripherals: DMA, WDT
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Package / Case: 144-LQFP
• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Number Of I /o: -
• Eeprom Size: -
• Oscillator Type: -
• Lead Free Status / Rohs Status: Details
• Other names: Q5704184A

7.5
Interrupts
7.5.1.3
7.5.1.4
used to exit a standby mode.
to the CPU via the clock generator. For these interrupt sources, appropriate settings must be made in the
clock generator in advance. External interrupt sources not used for exiting a standby mode can be used with-
out setting the clock generator.
terrupts are not used as a trigger to release standby (route 6 of Figure 7-1), input signals from the exter-
nal interrupt pins are directly sent to the CPU. Since the CPU recognizes "High" input as an interrupt, inter-
rupts occur if corresponding interrupts are enabled by the CPU as inputs are being disabled.
and enable it. Then, enable interrupts on the CPU.
An interrupt signal from an external pin or peripheral function is directly sent to the CPU unless it is
Interrupt requests from interrupt sources that can be used for clearing a standby mode are transmitted
If you use external interrupts, be aware the followings not to generate unexpected interrupts.
If input disabled (PxIE<PxmIE>="0"), inputs from external interrupt pins are "High". Also, if external in-
To use the external interrupt without setting it as a standby trigger, set the interrupt pin input as "Low"
Transmission
Precautions when using external interrupt pins
・ From external pin
・ From peripheral function
・ By setting Interrupt Set-Pending Register (forced pending)
ing Register.
Set the port control register so that the external pin can perform as an interrupt function pin.
Set the peripheral function to make it possible to output interrupt requests.
See the chapter of each peripheral function for details.
An interrupt request can be generated by setting the relevant bit of the Interrupt Set-Pend-
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TMPM362F10FG