TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 593

• Manufacturer Part Number: TMPM362F10FG
• Description: 32BIT MICROCONTROLLER
• Manufacturer: Toshiba
• Series: TX03r

Specifications of TMPM362F10FG

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, Microwire, SIO, SPI, SSP, UART/USART
• Peripherals: DMA, WDT
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Package / Case: 144-LQFP
• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Number Of I /o: -
• Eeprom Size: -
• Oscillator Type: -
• Lead Free Status / Rohs Status: Details
• Other names: Q5704184A

19. Backup module
19.1
19.2
PC
PD
PG
PH
PO
tion. By cutting electricity to the entire block, such as CPU or other peripheral IPs, other than the backup module,
this mode significantly reduces power consumption.
PA
PB
PE
PF
PK
PP
The BACKUP mode, one of the system operation modes, enable the MCU to operate in the low power consump-
The BACKUP mode contains two modes :
Features
Block Diagram
-
-
BACKUP SLEEP mode (enabling low frequency oscillator)
BACKIUP STOP mode (disabling low frequency oscillator)
Keep
Logic
Power shutdown blocks in the BACKUP mode
Port
Logic
Figure 19-1 Power shutdown blocks in the backup mode
DVSS AVSS AVDD3 VREFH
DVDD3B / RVDD3
Converter
Other Logic
Flash ROM
Main RAM
Regulator
(1024KB)
(56KB)
AD
CPU,
PLL
Page 569
DVDD3A
Backup RAM
KWUP,RTC
CEC,RMC
X1
(8KB)
High-OSC
DVSS
X2
Regulator and
Backup Cont.
Generator
Clock
XT1
Low-OSC
XT2
TMPM362F10FG
Port
Logic
PL
PM
PI
PJ
PN