TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 504

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TMPM362F10FG

Manufacturer Part Number
TMPM362F10FG
Description
32BIT MICROCONTROLLER
Manufacturer
Toshiba
Series
TX03r
Datasheet

Specifications of TMPM362F10FG

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, Microwire, SIO, SPI, SSP, UART/USART
Peripherals
DMA, WDT
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b
Package / Case
144-LQFP
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
-
Can
-
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Number Of I /o
-
Eeprom Size
-
Oscillator Type
-
Lead Free Status / Rohs Status
 Details
Other names
Q5704184A

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM362F10FG
Manufacturer:
Freescale
Quantity:
488
Part Number:
TMPM362F10FG(C)
Manufacturer:
Toshiba
Quantity:
10 000
14.8
Control in SIO mode
14.8
14.8.1
14.8.1.1
Control in SIO mode
Serial Clock
Figure 14-16 Maximum Transfer Frequency of External Clock Input
(1)
(2)
Internal or external clocks can be selected by programming SBIxCR1<SCK[2:0]>.
SCKx pin output
SOx pin output
Clock source
is output to the outside through the SCKx pin.
the received data, the SBI automatically enters a wait period. During this period, the serial clock is stop-
ped automatically and the next shift operation is suspended until the processing is completed.
widths as shown below.
In the internal clock mode, one of the seven frequencies can be selected as a serial clock, which
At the beginning of a transfer, the SCKx pin output becomes the "High" level.
If the program cannot keep up with this serial clock rate in writing the transmit data or reading
The SBI uses an external clock supplied from the outside to the SCKx pin as a serial clock.
For proper shift operations, the serial clock at the "High" and "Low" levels must have the pulse
Internal clocks
External clock (<SCK[2:0]> = "111")
SCKx
a 0
1
a
f
Figure 14-15 Automatic Wait
SCKL
a 1 a 2 a 5 a 6 a 7
2
, f
f
3
SCKL
SCKH
f
SCKH
7
> 4/fsys
Page 480
8
b
b 0 b 1
1
2
c
b 4
b 5 b 6
6
7
b 7
8
c 0
1
c 1 c 2
2
TMPM362F10FG
3

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