TMPM362F10FG Toshiba, TMPM362F10FG Datasheet - Page 101

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TMPM362F10FG

Manufacturer Part Number
TMPM362F10FG
Description
32BIT MICROCONTROLLER
Manufacturer
Toshiba
Series
TX03r
Datasheet

Specifications of TMPM362F10FG

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, Microwire, SIO, SPI, SSP, UART/USART
Peripherals
DMA, WDT
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b
Package / Case
144-LQFP
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
-
Can
-
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Number Of I /o
-
Eeprom Size
-
Oscillator Type
-
Lead Free Status / Rohs Status
 Details
Other names
Q5704184A

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Company
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Manufacturer
Quantity
Price
Part Number:
TMPM362F10FG
Manufacturer:
Freescale
Quantity:
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Part Number:
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Manufacturer:
Toshiba
Quantity:
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(3)
(4)
(5)
(6)
set Control Register.
be used as the function pin. Setting PxIE[m] allows the pin to be used as the input port.
eral function for details.
bit of this register.
and enable interrupts in the CGIMCG register of the clock generator. The CGIMCG register is capa-
ble of configuring each source.
avoid unexpected interrupt.To clear corresponding interrupt request, write a value corresponding to
the interrupt to be used to the CGICRCG register.See "7.6.3.7 CGICRCG (CG Interrupt Request
Clear Register)" for each value.
NVIC register
<PRI_n>
<PRIGROUP>
Port register
PxFRn<PxmFn>
PxIE<PxmIE>
NVIC register
Interrupt Set-Pending [m]
You can assign grouping priority by using the <PRIGROUP> in the Application Interrupt and Re-
Set "1" to the port function register of the corresponding pin. Setting PxFRn[m] allows the pin to
The setting varies depending on the peripheral function to be used. See the chapter of each periph-
To generate an interrupt by using the Interrupt Set-Pending Register, set "1" to the corresponding
For an interrupt source to be used for exiting a standby mode, you need to set the active level
Before enabling an interrupt, clear the corresponding interrupt request already held. This can
Note:"n" indicates the corresponding exceptions/interrupts.
Note:x: port number / m: corresponding bit / n: function register number In modes other than
Note:m: corresponding bit
Preconfiguration (1) (Interrupt from external pin)
Preconfiguration (2) (Interrupt from peripheral function)
Preconfiguration (3) (Interrupt Set-Pending Register)
Configuring the clock generator
This product uses three bits for assigning a priority level.
STOP mode, setting PxIE to enable input enables the corresponding interrupt input regard-
less of the PxFR setting. Be careful not to enable interrupts that are not used. Also, be
aware of the description of "7.5.1.4 Precautions when using external interrupt pins".
"prioryty"
"group priority" (This is configurable if required.)
"1"
"1"
"1"
Page 77
TMPM362F10FG

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