SAF-C515C-8EM CA Infineon Technologies, SAF-C515C-8EM CA Datasheet - Page 46

• Manufacturer Part Number: SAF-C515C-8EM CA
• Description: IC MCU 8BIT OTP MQFP-80-1
• Manufacturer: Infineon Technologies
• Series: C5xx/C8xxr

Specifications of SAF-C515C-8EM CA

• Core Processor: C500
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: OTP
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 4.25 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-SQFP
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: USART, SSC
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 3
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Packages: PG-MQFP-80
• Max Clock Frequency: 10.0 MHz
• Sram (incl. Cache): 2.25 KByte
• Can Nodes: 1
• A / D Input Lines (incl. Fadc): 8
• Program Memory: 64.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: F515C8EMCANP; F515C8EMCAXT; SAF-C515C-8EMCA; SAF-C515C-8EMCA; SAF-C515C-8EMCAIN; SAFC515C8EMCAX; SP000068749; SP000106399

C515C
CAN Controller
The on-chip CAN controller is the functional heart which provides all resources that are
required to run the standard CAN protocol (11-bit identifiers) as well as the extended
CAN protocol (29-bit identifiers). It provides a sophisticated object layer to relieve the
CPU of as much overhead as possible when controlling many different message objects
(up to 15). This includes bus arbitration, resending of garbled messages, error handling,
interrupt generation, etc. In order to implement the physical layer, external components
have to be connected to the C515C.
The internal bus interface connects the on-chip CAN controller to the internal bus of the
microcontroller. The registers and data locations of the CAN interface are mapped to a
specific 256 bytes wide address range of the external data memory area (F700
to
H
F7FF
) and can be accessed using MOVX instructions.
Figure 17
shows a block
H
diagram of the on-chip CAN controller.
Data Sheet
42
2003-02