SAF-C515C-8EM CA Infineon Technologies, SAF-C515C-8EM CA Datasheet - Page 14

IC MCU 8BIT OTP MQFP-80-1

SAF-C515C-8EM CA

Manufacturer Part Number
SAF-C515C-8EM CA
Description
IC MCU 8BIT OTP MQFP-80-1
Manufacturer
Infineon Technologies
Series
C5xx/C8xxr
Datasheet

Specifications of SAF-C515C-8EM CA

Core Processor
C500
Core Size
8-Bit
Speed
10MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
49
Program Memory Size
64KB (64K x 8)
Program Memory Type
OTP
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
4.25 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-SQFP
Data Bus Width
8 bit
Data Ram Size
2.25 KB
Interface Type
USART, SSC
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
49
Number Of Timers
3
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Packages
PG-MQFP-80
Max Clock Frequency
10.0 MHz
Sram (incl. Cache)
2.25 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
8
Program Memory
64.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
F515C8EMCANP
F515C8EMCAXT
SAF-C515C-8EMCA
SAF-C515C-8EMCA
SAF-C515C-8EMCAIN
SAFC515C8EMCAX
SP000068749
SP000106399
Table 2
Symbol
ALE
EA
P0.0-P0.7
P5.0-P5.7
Data Sheet
Pin Number
P-MQFP-80-1
48
49
52-59
67-60
Pin Definitions and Functions (cont’d)
I/O
O
I
I/O
I/O
1)
Function
The Address Latch Enable
output is used for latching the address into external
memory during normal operation. It is activated
every six oscillator periods, except during an
external data memory access. ALE can be switched
off when the program is executed internally.
External Access Enable
When held high, the C515C executes instructions
always from the internal ROM. When held low, the
C515C fetches all instructions from external
program memory.
Note: For the ROM protection version EA pin is
Port 0
is an 8-bit open-drain bidirectional I/O port.
Port 0 pins that have 1's written to them float, and in
that state can be used as high-impedance inputs.
Port 0 is also the multiplexed low-order address and
data bus during accesses to external program and
data memory. In this application it uses strong
internal pullup resistors when issuing 1's.
Port 0 also outputs the code bytes during program
verification in the C515C. External pullup resistors
are required during program verification.
Port 5
is an 8-bit quasi-bidirectional I/O port with internal
pullup resistors. Port 5 pins that have 1's written to
them are pulled high by the internal pullup resistors,
and in that state can be used as inputs. As inputs,
port 5 pins being externally pulled low will source
current (
the internal pullup resistors.
Port 5 can also be switched into a bidirectional
mode, in which CMOS levels are provided. In this
bidirectional mode, each port 5 pin can be
programmed individually as input or output.
latched during reset.
10
I
IL
, in the DC characteristics) because of
C515C
2003-02

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