SAF-C515C-8EM CA Infineon Technologies, SAF-C515C-8EM CA Datasheet - Page 13

IC MCU 8BIT OTP MQFP-80-1

SAF-C515C-8EM CA

Manufacturer Part Number
SAF-C515C-8EM CA
Description
IC MCU 8BIT OTP MQFP-80-1
Manufacturer
Infineon Technologies
Series
C5xx/C8xxr
Datasheet

Specifications of SAF-C515C-8EM CA

Core Processor
C500
Core Size
8-Bit
Speed
10MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
49
Program Memory Size
64KB (64K x 8)
Program Memory Type
OTP
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
4.25 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-SQFP
Data Bus Width
8 bit
Data Ram Size
2.25 KB
Interface Type
USART, SSC
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
49
Number Of Timers
3
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Packages
PG-MQFP-80
Max Clock Frequency
10.0 MHz
Sram (incl. Cache)
2.25 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
8
Program Memory
64.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
F515C8EMCANP
F515C8EMCAXT
SAF-C515C-8EMCA
SAF-C515C-8EMCA
SAF-C515C-8EMCAIN
SAFC515C8EMCAX
SP000068749
SP000106399
Table 2
Symbol
XTAL1
P2.0-P2.7
CPUR
PSEN
Data Sheet
Pin Number
P-MQFP-80-1
37
38-45
46
47
Pin Definitions and Functions (cont’d)
I/O
O
I/O
O
O
1)
Function
XTAL1
Output of the inverting oscillator amplifier.
Port 2
is an 8-bit quasi-bidirectional I/O port with internal
pullup resistors. Port 2 pins that have 1's written to
them are pulled high by the internal pullup resistors,
and in that state can be used as inputs. As inputs,
port 2 pins being externally pulled low will source
current (
the internal pullup resistors.
Port 2 emits the high-order address byte during
fetches from external program memory and during
accesses to external data memory that use 16-bit
addresses (MOVX @DPTR). In this application it
uses strong internal pullup resistors when issuing
1's. During accesses to external data memory that
use 8-bit addresses (MOVX @Ri), port 2 issues the
contents of the P2 special function register.
CPU Running Condition
This output pin is at low level when the CPU is
running and program fetches or data accesses in
the external data memory area are executed. In idle
mode, hardware and software power down mode,
and with an active RESET signal CPUR is set to
high level.
CPUR can be typically used for switching external
memory devices into power saving modes.
The Program Store Enable
output is a control signal that enables the external
program memory to the bus during external fetch
operations. It is activated every six oscillator
periods, except during external data memory
accesses. The signal remains high during internal
program execution.
9
I
IL
, in the DC characteristics) because of
C515C
2003-02

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