SAF-C515C-8EM CA Infineon Technologies, SAF-C515C-8EM CA Datasheet - Page 37

• Manufacturer Part Number: SAF-C515C-8EM CA
• Description: IC MCU 8BIT OTP MQFP-80-1
• Manufacturer: Infineon Technologies
• Series: C5xx/C8xxr

Specifications of SAF-C515C-8EM CA

• Core Processor: C500
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: OTP
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 4.25 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-SQFP
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: USART, SSC
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 3
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Packages: PG-MQFP-80
• Max Clock Frequency: 10.0 MHz
• Sram (incl. Cache): 2.25 KByte
• Can Nodes: 1
• A / D Input Lines (incl. Fadc): 8
• Program Memory: 64.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: F515C8EMCANP; F515C8EMCAXT; SAF-C515C-8EMCA; SAF-C515C-8EMCA; SAF-C515C-8EMCAIN; SAFC515C8EMCAX; SP000068749; SP000106399

Port Structure Selection of Port 5
After a reset operation of the C515C, the quasi-bidirectional 8051-compatible port
structure is selected. For selection of the bidirectional (CMOS) port 5 structure the bit
PMOD of SFR SYSCON must be set. Because each port 5 pin can be programmed as
an input or an output, additionally, after the selection of the bidirectional mode the
direction register DIR5 of port 5 must be written. This direction register is mapped to the
port 5 register. This means, the port register address is equal to its direction register
address.
Figure 10
Data Sheet
Instruction sequence for the programming of the direction registers:
ORL IP1, #80H ; Set bit PDIR
MOV
Int. Bus, Bit 7
Write to IP 1
DIRx,
Figure 10
#OYYH
Port Register, Direction Register
;
D
R
Write port x direction register with value YYH
illustrates the port and direction register configuration.
PDIR
Q
Q
2.5 Machine Cycles
Delay:
33
Enable
Enable
Direction Register
Read Port
Port Register
Write to Port
MCS02649
Internal
C515C
2003-02
Bus