UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 483

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UPD78F0500AMC-CAB-AX

Manufacturer Part Number
UPD78F0500AMC-CAB-AX
Description
MCU 8BIT 30SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0500AMC-CAB-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2
15.4.3 Dedicated baud rate generator
generates a serial clock for transmission/reception of UART6.
(1) Configuration of baud rate generator
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
The dedicated baud rate generator consists of a source clock selector and an 8-bit programmable counter, and
Separate 8-bit counters are provided for transmission and reception.
• Base clock
• Transmission counter
• Reception counter
The clock selected by bits 3 to 0 (TPS63 to TPS60) of clock selection register 6 (CKSR6) is supplied to each
module when bit 7 (POWER6) of asynchronous serial interface operation mode register 6 (ASIM6) is 1. This
clock is called the base clock and its frequency is called f
POWER6 = 0.
This counter stops operation, cleared to 0, when bit 7 (POWER6) or bit 6 (TXE6) of asynchronous serial interface
operation mode register 6 (ASIM6) is 0.
It starts counting when POWER6 = 1 and TXE6 = 1.
The counter is cleared to 0 when the first data transmitted is written to transmit buffer register 6 (TXB6).
If data are continuously transmitted, the counter is cleared to 0 again when one frame of data has been completely
transmitted. If there is no data to be transmitted next, the counter is not cleared to 0 and continues counting until
POWER6 or TXE6 is cleared to 0.
This counter stops operation, cleared to 0, when bit 7 (POWER6) or bit 5 (RXE6) of asynchronous serial interface
operation mode register 6 (ASIM6) is 0.
It starts counting when the start bit has been detected.
The counter stops operation after one frame has been received, until the next start bit is detected.
XCLK6
CHAPTER 15 SERIAL INTERFACE UART6
. The base clock is fixed to low level when
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