UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 397

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UPD78F0500AMC-CAB-AX

Manufacturer Part Number
UPD78F0500AMC-CAB-AX
Description
MCU 8BIT 30SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0500AMC-CAB-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2
11.2 Configuration of Watchdog Timer
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
WINDOW1 and WINDOW0
The watchdog timer includes the following hardware.
How the counter operation is controlled, overflow time, and window open period are set by the option byte.
of option byte (0080H)
WDCS2 to WDCS0 of
option byte (0080H)
CPU access signal
WDTON of option
Remark For the option byte, see CHAPTER 26 OPTION BYTE.
f
RL
Window open period
Controlling counter operation of watchdog timer
Overflow time of watchdog timer
byte (0080H)
/2
Control register
Setting of Watchdog Timer
controller
Clock
input
Item
Table 11-2. Setting of Option Bytes and Watchdog Timer
Watchdog timer enable
register (WDTE)
Figure 11-1. Block Diagram of Watchdog Timer
Clear, reset control
Table 11-1. Configuration of Watchdog Timer
counter
17-bit
Watchdog timer enable register (WDTE)
Count clear
signal
2
2
10
17
error detector
CPU access
/f
/f
RL
RL
Internal bus
to
determination
Selector
Window size
Bits 6 and 5 (WINDOW1, WINDOW0)
Bit 4 (WDTON)
Bits 3 to 1 (WDCS2 to WDCS0)
signal
Configuration
Overflow
signal
Option Byte (0080H)
CHAPTER 11 WATCHDOG TIMER
controller
output
Reset
Internal reset signal
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